Z8F042AHJ020SC00TR Zilog, Z8F042AHJ020SC00TR Datasheet - Page 58

• Manufacturer Part Number: Z8F042AHJ020SC00TR
• Description: IC ENCORE XP MCU FLASH 4K 28SSOP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F042AHJ020SC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 23
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: Z8F042AHJ020SC00T

Table 18. Port A–D Control Registers (PxCTL)
Table 19. Port A–D Data Direction Sub-Registers (PxDD)
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS022825-0908
Port A–D Data Direction Sub-Registers
Port A–D Alternate Function Sub-Registers
DD7
R/W
R/W
If 01H in Port A–D Address Register, accessible through the Port A–D Control Register
7
7
1
PCTL[7:0]—Port Control
The Port Control register provides access to all sub-registers that configure the GPIO Port
operation.
The Port A–D Data Direction sub-register is accessed through the Port A–D Control
register by writing 01H to the Port A–D Address register
DD[7:0]—Data Direction
These bits control the direction of the associated port pin. Port Alternate Function
operation overrides the Data Direction register setting.
0 = Output. Data in the Port A–D Output Data register is driven onto the port pin.
1 = Input. The port pin is sampled and the value written into the Port A–D Input Data Reg-
ister. The output driver is tristated.
The Port A–D Alternate Function sub-register
Port A–D Control register by writing
Alternate Function sub-registers enable the alternate function selection on pins. If dis-
abled, pins functions as GPIO. If enabled, select one of four alternate functions using
alternate function set subregisters 1 and 2 as described in the
R/W
DD6
R/W
6
6
1
DD5
R/W
R/W
5
5
1
FD1H, FD5H, FD9H, FDDH
R/W
DD4
R/W
4
4
1
02H
PCTL
00H
to the Port A–D Address register. The Port A–D
DD3
R/W
R/W
(Table
3
3
1
20) is accessed through the
Z8 Encore! XP
(Table
R/W
DD2
R/W
2
2
1
Port A–D Alternate Function
General-Purpose Input/Output
Product Specification
19).
DD1
R/W
R/W
1
1
1
®
F082A Series
R/W
DD0
R/W
0
0
1
47