Z8F042AHJ020SC00TR Zilog, Z8F042AHJ020SC00TR Datasheet - Page 200

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Z8F042AHJ020SC00TR

Manufacturer Part Number
Z8F042AHJ020SC00TR
Description
IC ENCORE XP MCU FLASH 4K 28SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheets

Specifications of Z8F042AHJ020SC00TR

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
23
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
Z8F042AHJ020SC00T
PS022825-0908
Clock Failure Detection and Recovery
When selecting a new clock source, the system clock oscillator failure detection circuitry
and the Watchdog Timer oscillator failure circuitry must be disabled. If SOFEN and
WOFEN are not disabled prior to a clock switch-over, it is possible to generate an inter-
rupt for a failure of either oscillator. The Failure detection circuitry can be enabled any-
time after a successful write of OSCSEL in the OSCCTL register.
The internal precision oscillator is enabled by default. If the user code changes to a differ-
ent oscillator, it may be appropriate to disable the IPO for power savings. Disabling the
IPO does not occur automatically.
System Clock Oscillator Failure
The Z8F04xA family devices can generate non-maskable interrupt-like events when the
primary oscillator fails. To maintain system function in this situation, the clock failure
recovery circuitry automatically forces the Watchdog Timer oscillator to drive the system
clock. The Watchdog Timer oscillator must be enabled to allow the recovery. Although
this oscillator runs at a much slower speed than the original system clock, the CPU contin-
ues to operate, allowing execution of a clock failure vector and software routines that
either remedy the oscillator failure or issue a failure alert. This automatic switch-over is
not available if the Watchdog Timer is selected as the system clock oscillator. It is also
unavailable if the Watchdog Timer oscillator is disabled, though it is not necessary to
enable the Watchdog Timer reset function (see
The primary oscillator failure detection circuitry asserts if the system clock frequency
drops below 1 kHz ±50%. If an external signal is selected as the system oscillator, it is
possible that a very slow but non-failing clock can generate a failure condition. Under
these conditions, do not enable the clock failure circuitry (SOFEN must be deasserted in
the OSCCTL register).
Watchdog Timer Failure
In the event of a Watchdog Timer oscillator failure, a similar non-maskable interrupt-like
event is issued. This event does not trigger an attendant clock switch-over, but alerts the
CPU of the failure. After a Watchdog Timer failure, it is no longer possible to detect a pri-
mary oscillator failure. The failure detection circuitry does not function if the Watchdog
Timer is used as the system clock oscillator or if the Watchdog Timer oscillator has been
disabled. For either of these cases, it is necessary to disable the detection circuitry by
deasserting the WDFEN bit of the OSCCTL register.
The Watchdog Timer oscillator failure detection circuit counts system clocks while
looking for a Watchdog Timer clock. The logic counts 8004 system clock cycles before
determining that a failure has occurred. The system clock rate determines the speed at
which the Watchdog Timer failure can be detected. A very slow system clock results in
very slow detection times.
Watchdog Timer
Z8 Encore! XP
Product Specification
on page 91).
®
F082A Series
Oscillator Control
189

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