HD64F2134FA20 Renesas Electronics America, HD64F2134FA20 Datasheet - Page 415

• Manufacturer Part Number: HD64F2134FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of HD64F2134FA20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Table 13.5 Examples of TCR and TCSR Settings
Register
TCR in TMR1
TCSR in TMR1
TCR in FRT
TCSR in FRT
Bit(s)
7
6
5
4 and 3 CCLR1, CCLR0
2 to 0
3 to 0
6
1 and 0 CKS1, CKS0
0
Abbreviation
CMIEB
CMIEA
OVIE
CKS2 to CKS0
OS3 to OS0
IEDGB
CCLRA
Contents Description
0
0
0
11
101
0011
1001
0/1
01
0
Section 13 Timer Connection [H8S/2138 Group]
Rev. 4.00 Jun 06, 2006 page 359 of 1004
Interrupts due to compare-match and
overflow are disabled
TCNT is cleared by the rising edge of
the external reset signal (inverted IVI
signal)
TCNT is incremented on the rising
edge of the external clock (IHI signal)
Not changed by compare-match B;
output inverted by compare-match A
(toggle output): division by 512
or
when TCORB < TCORA, 1 output on
compare-match B, and 0 output on
compare-match A: division by 256
0: FRC value is transferred to ICRB
1: FRC value is transferred to ICRB
FRC is incremented on internal
clock: /8
FRC clearing is disabled
on falling edge of input capture
input B (IHI divided signal
waveform)
on rising edge of input capture
input B (IHI divided signal
waveform)
REJ09B0301-0400