HD64F2134FA20 Renesas Electronics America, HD64F2134FA20 Datasheet - Page 905

• Manufacturer Part Number: HD64F2134FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of HD64F2134FA20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

A.4
The tables in this section can be used to calculate the number of states required for instruction
execution by the H8S/2000 CPU. Table A.5 shows the number of instruction fetch, data
read/write, and other cycles occurring in each instruction, and table A.4 shows the number of
states required per cycle according to the bus size. The number of states required for execution of
an instruction can be calculated from these two tables as follows:
Examples of Calculation of Number of States Required for Execution
Examples: Advanced mode, stack located in external address space, on-chip supporting modules
accessed in two states with 8-bit bus width, external devices accessed in three states with one wait
state and 8-bit bus width.
1. BSET #0,@FFFFC7:8
2. JSR @@30
From table A.5, I = L = 2 and J = K = M = N = 0
From table A.4, S
Number of states = 2
From table A.5, I = J = K = 2 and L = M = N = 0
From table A.4, S
Number of states = 2
Number of states = I
Number of States Required for Execution
I
I
= 8 and S
= S
J
= S
8 + 2
8 + 2
K
= 8
L
S
= 2
I
+ J
2 = 20
8 + 2
S
J
+ K
8 = 48
S
K
+ L
Rev. 4.00 Jun 06, 2006 page 849 of 1004
S
L
+ M
S
M
Appendix A Instruction Set
+ N
S
N
REJ09B0301-0400