HD64F2134FA20 Renesas Electronics America, HD64F2134FA20 Datasheet - Page 494

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HD64F2134FA20

Manufacturer Part Number
HD64F2134FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of HD64F2134FA20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2134FA20
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F2134FA20V
Manufacturer:
RENESAS
Quantity:
201
Section 15 Serial Communication Interface (SCI, IrDA)
15.3.4
In synchronous mode, data is transmitted or received in synchronization with clock pulses, making
it suitable for high-speed serial communication.
Inside the SCI, the transmitter and receiver are independent units, enabling full-duplex
communication by use of a common clock. Both the transmitter and the receiver also have a
double-buffered structure, so that data can be read or written during transmission or reception,
enabling continuous data transfer.
Figure 15.14 shows the general format for synchronous serial communication.
In synchronous serial communication, data on the transmission line is output from one falling edge
of the serial clock to the next. Data is guaranteed valid at the rising edge of the serial clock.
In synchronous serial communication, one character consists of data output starting with the LSB
and ending with the MSB. After the MSB is output, the transmission line holds the MSB state.
In synchronous mode, the SCI receives data in synchronization with the rising edge of the serial
clock.
Data Transfer Format
A fixed 8-bit data format is used.
No parity or multiprocessor bits are added.
Rev. 4.00 Jun 06, 2006 page 438 of 1004
REJ09B0301-0400
Note: * High except in continuous transfer
Serial
clock
Serial
data
Operation in Synchronous Mode
Don’t care
*
Figure 15.14 Data Format in Synchronous Communication
LSB
Bit 0
Bit 1
One unit of transfer data (character or frame)
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
MSB
Don’t care
*

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