HD64F2134FA20 Renesas Electronics America, HD64F2134FA20 Datasheet - Page 745

• Manufacturer Part Number: HD64F2134FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of HD64F2134FA20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Bit 5—Noise Elimination Sampling Frequency Select (NESEL): Selects the frequency at which
the subclock ( SUB) input from the EXCL pin is sampled with the clock ( ) generated by the
system clock oscillator. When = 5 MHz or higher, clear this bit to 0.
Bit 4—Subclock Input Enable (EXCLE): Controls subclock input from the EXCL pin.
Bits 3 to 0—Reserved: These bits cannot be modified and are always read as 0.
24.2.3
TCSR1
TCSR1 is an 8-bit readable/writable register that performs selection of the WDT1 TCNT input
clock, mode, etc.
Only bit 4 is described here. For details of the other bits, see section 14.2.2, Timer Control/Status
Register (TCSR).
TCSR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 5
NESEL
0
1
Bit 4
EXCLE
0
1
Bit
Initial value
Read/Write
Note: * Only 0 can be written in bit 7, to clear the flag.
Timer Control/Status Register (TCSR)
Description
Sampling at
Sampling at
Description
Subclock input from EXCL pin is disabled
Subclock input from EXCL pin is enabled
R/(W) *
OVF
7
0
divided by 32
divided by 4
WT/IT
R/W
6
0
TME
R/W
5
0
PSS
R/W
4
0
RST/NMI
Rev. 4.00 Jun 06, 2006 page 689 of 1004
R/W
3
0
Section 24 Power-Down State
CKS2
R/W
2
0
CKS1
R/W
REJ09B0301-0400
1
0
(Initial value)
(Initial value)
CKS0
R/W
0
0