HD64F2134FA20 Renesas Electronics America, HD64F2134FA20 Datasheet - Page 48

• Manufacturer Part Number: HD64F2134FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of HD64F2134FA20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 1 Overview
Table 1.1
Table 1.2
Table 1.3
Table 1.4
Section 2 CPU
Table 2.1
Table 2.2
Table 2.3
Table 2.4
Table 2.5
Table 2.6
Table 2.7
Section 3 MCU Operating Modes
Table 3.1
Table 3.2
Table 3.3
Section 4 Exception Handling
Table 4.1
Table 4.2
Table 4.3
Section 5 Interrupt Controller
Table 5.1
Table 5.2
Table 5.3
Table 5.4
Table 5.5
Table 5.6
Table 5.7
Table 5.8
Table 5.9
Table 5.10
Rev. 4.00 Jun 06, 2006 page xlvi of liv
Overview ................................................................................................................
H8S/2138 Group Pin Functions in Each Operating Mode ..................................... 11
H8S/2134 Group Pin Functions in Each Operating Mode ..................................... 15
Pin Functions.......................................................................................................... 18
Instruction Classification........................................................................................ 42
Combinations of Instructions and Addressing Modes............................................ 43
Instructions Classified by Function ........................................................................ 45
Addressing Modes.................................................................................................. 55
Absolute Address Access Ranges .......................................................................... 56
Effective Address Calculation................................................................................ 59
Exception Handling Types and Priority ................................................................. 64
MCU Operating Mode Selection............................................................................ 71
MCU Registers....................................................................................................... 72
Pin Functions in Each Mode .................................................................................. 79
Exception Types and Priority ................................................................................. 91
Exception Vector Table.......................................................................................... 93
Status of CCR and EXR after Trap Instruction Exception Handling ..................... 98
Interrupt Controller Pins......................................................................................... 102
Interrupt Controller Registers................................................................................. 103
Correspondence between Interrupt Sources and ICR Settings ............................... 105
Interrupt Sources, Vector Addresses, and Interrupt Priorities ................................ 116
Interrupt Control Modes......................................................................................... 121
Interrupts Selected in Each Interrupt Control Mode .............................................. 123
Operations and Control Signal Functions in Each Interrupt Control Mode ........... 123
Interrupt Response Times....................................................................................... 131
Number of States in Interrupt Handling Routine Execution .................................. 131
Interrupt Source Selection and Clearing Control ................................................... 135
Tables
2