M052LAN Nuvoton Technology Corporation of America, M052LAN Datasheet - Page 111

• Manufacturer Part Number: M052LAN
• Description: IC MCU 32BIT 8KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r

Specifications of M052LAN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.3.7
NuMicro M051
This device is equipped a power-of-2 frequency divider which is composed by16 chained divide-
by-2 shift registers. One of the 16 shift register outputs selected by a sixteen to one multiplexer is
reflected to P3.6. Therefore there are 16 options of power-of-2 divided clocks with the frequency
from F
The output formula is F
divider output frequency and N is the 4-bit value in FREQDIV.FSEL[3:0].
When write 1 to DIVIDER_EN (FRQDIV[4]), the chained counter starts to count. When write 0 to
DIVIDER_EN (FRQDIV[4]), the chained counter continuously runs till divided clock reaches low
state and stay in low state.
FRQDIV_CLK
Frequency Divider Output
in
/2
FREQDIV.FDIV_EN[4]
Reset Clock
1
to F
Divider
0 to 1
in
1/2
/2
17
22.1184M
Ext. Crystal
1/2
where Fin is input clock frequency to the clock divider.
HCLK
2
Figure 6.3-7 Block Diagram of Frequency Divider
Figure 6.3-6 Clock Source of Frequency Divider
divide-by-2 counter
1/2
out
3
™
16 chained
= F
Series Technical Reference Manual
in
…...
/2
11
10
00
(N+1)
, where F
1/2
5
CLKSEL2.FRQDIV_S[3:2]
APBCLK.FRQDIV_EN[6]
1
- 111 -
1/2
6
1
in
FREQDIV.FSEL[3:0]
000
001
110
111
:
:
is the input clock frequency, F
16 to 1
MUX
Publication Release Date: Sept 14, 2010
P3_DOUT[6]
FRQDIV_CLK
P3_MFP[6]
P3_ALT[6]
10
00
P3.6/CLKO
out
Revision V1.2
is the clock