M052LAN Nuvoton Technology Corporation of America, M052LAN Datasheet - Page 271

IC MCU 32BIT 8KB FLASH 48LQFP

M052LAN

Manufacturer Part Number
M052LAN
Description
IC MCU 32BIT 8KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro M051™r
Datasheets

Specifications of M052LAN

Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
40
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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6.10 UART Interface Controller
6.10.1 Overview
NuMicro M051
NuMicro
Receiver/Transmitters (UART). UART0~1 performs Normal Speed UART, and support flow
control function.
The Universal Asynchronous Receiver/Transmitter (UART) performs a serial-to-parallel
conversion on data received from the peripheral, and a parallel-to-serial conversion on data
transmitted from the CPU. The UART controller also supports IrDA SIR Function, and RS-485
mode functions. Each UART channel supports five types of interrupts including transmitter FIFO
empty interrupt (INT_THRE), receiver threshold level reaching interrupt (INT_RDA), line status
interrupt (parity error or framing error or break interrupt) (INT_RLS), receiver buffer time out
interrupt (INT_TOUT), and MODEM/Wakeup status interrupt (INT_MODEM). Interrupt number 12
(vector number is 28) supports UART0 interrupt. Interrupt number 13 (vector number is 29)
supports UART1 interrupt. Refer to Nested Vectored Interrupt Controller chapter for System
Interrupt Map.
The UART0~1 are equipped 15-bytes transmitter FIFO (TX_FIFO) and 15-bytes receiver FIFO
(RX_FIFO). The CPU can read the status of the UART at any time during the operation. The
reported status information includes the type and condition of the transfer operations being
performed by the UART, as well as 3 error conditions (parity error, framing error, and break
interrupt) probably occur while receiving data. The UART includes a programmable baud rate
generator that is capable of dividing clock input by divisors to produce the serial clock that
transmitter and receiver need. The baud rate equation is Baud Rate = UART_CLK / M * [BRD +
2], where M and BRD are defined in Baud Rate Divider Register (UA_BAUD). The Table 6.10-1
and Table 6.10-2 list the equations in the various conditions and the UART baud rate setting
table.
Mode
0
1
2
M051
DIV_X_EN
0
1
1
series
DIV_X_ONE
Table 6.10-1 UART Baud Rate Equation
0
0
1
provides
Series Technical Reference Manual
Don’t care
Divider X
up
B
B
- 271 -
to
two
BRD
A
A
A
channels
Baud rate equation
UART_CLK / [16 * (A+2)]
UART_CLK / [(B+1) * (A+2)] , B must >= 8
UART_CLK / (A+2), A must >=3
Publication Release Date: Sept 14, 2010
of
Universal
Asynchronous
Revision V1.2

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