M052LAN Nuvoton Technology Corporation of America, M052LAN Datasheet - Page 330

• Manufacturer Part Number: M052LAN
• Description: IC MCU 32BIT 8KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r

Specifications of M052LAN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

A/D Status Register (ADSR)
Register
ADSR
Bits
[31:24]
[23:16]
[15:8]
[7]
[6:4]
[3]
Reserved
31
23
15
7
NuMicro M051
Descriptions
Reserved
OVERRUN
VALID
Reserved
CHANNEL
BUSY
Offset
ADC_BA+0x30
30
22
14
6
CHANNEL
29
21
13
5
R/W
R/W
-
Over Run flag (Read Only)
It is a mirror to OVERRUN bit in ADDRx
When ADC in Burst Mode, and the FIFO is overrun, OVERRUN[7:0] will all set
to 1.
Data Valid flag (Read Only)
It is a mirror of VALID bit in ADDRx
When ADC in Burst Mode, and the FIFO is valid, VALID[7:0] will all set to 1.
-
Current Conversion Channel
This filed reflects current conversion channel when BUSY=1. When BUSY=0, it
shows the next channel will be converted.
It is read only.
BUSY/IDLE
1 = A/D converter is busy at conversion.
0 = A/D converter is in idle state.
This bit is mirror of as ADST bit in ADCR.
It is read only.
™
Description
ADC Channel Selection Enable Register
Series Technical Reference Manual
28
20
12
4
- 330 -
OVERRUN
Reserved
VALID
BUSY
27
19
11
3
Publication Release Date: Sep 14, 2010
CMPF1
26
18
10
2
CMPF0
25
17
9
1
Revision V1.2
Reset Value
undefined
ADF
24
16
8
0