M052LAN Nuvoton Technology Corporation of America, M052LAN Datasheet - Page 313

• Manufacturer Part Number: M052LAN
• Description: IC MCU 32BIT 8KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r

Specifications of M052LAN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.11.4 ADC Operation Procedure
6.11.4.1 Self-Calibration
6.11.4.2 ADC Clock Generator
NuMicro M051
The A/D converter operates by successive approximation with 12-bit resolution. This A/D
converter equips with self calibration function to minimize conversion error, user can write 1 to
CALEN bit in ADCALR register to enable calibration function, while internal calibration is finished,
the CAL_DONE bit will assert. The ADC has four operation modes: single, burst, single-cycle
scan mode and continuous scan mode. When changing the operating mode or analog input
channel enable, in order to prevent incorrect operation, software must clear ADST bit to 0 in
ADCR register.
When chip power on or switch conversion mode between single-end mode and differential mode,
it needs to do ADC self calibration to minimize the conversion error. User can write 1 to CALEN
bit in ADCALR register to enable self calibration. The operation is process internally and it needs
127 ADC clocks to complete calibration. After CALEN is set to 1, software must wait CAL_DONE
bit set by internal hardware. The detail timing is shown as below:
The maximum sampling rate is up to 600K. The ADC engine has three clock sources selected by
2-bit ADC_S (CLKSEL[3:2]), the ADC clock frequency is divided by an 8-bit prescaler with the
formula:
The ADC clock frequency = (ADC clock source frequency) / (ADC_N+1) ;
where the 8-bit ADC_N is located in register CLKDIV[23:16].
In generally, software can set ADC_S and ADC_N to get 16 MHz or slightly less.
Because the Bandgap voltage source lacks the driving capability, a conversion rate lower than 15
kHz (@5V) is recommended.
CAL_DONE
ADC_CLK
CAL_EN
Figure 6.11-3 ADC Converter Self-Calibration Timing Diagram
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Series Technical Reference Manual
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Publication Release Date: Sept 14, 2010
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Revision V1.2