M052LAN Nuvoton Technology Corporation of America, M052LAN Datasheet - Page 8

• Manufacturer Part Number: M052LAN
• Description: IC MCU 32BIT 8KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r

Specifications of M052LAN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 6.9-3 Watchdog Timer Block Diagram.............................................................................. 267
Figure 6.10-1 UART Clock Control Diagram................................................................................ 275
Figure 6.10-2 UART Block Diagram............................................................................................. 276
Figure 6.10-3 Auto Flow Control Block Diagram.......................................................................... 278
Figure 6.10-4 IrDA Block Diagram ............................................................................................... 279
Figure 6.10-5 IrDA TX/RX Timing Diagram ................................................................................. 280
Figure 6.10-6 Structure of RS-485 Frame ................................................................................... 283
Figure 6.11-1 ADC Controller Block Diagram .............................................................................. 311
Figure 6.11-2 ADC Clock Control................................................................................................. 312
Figure 6.11-3 ADC Converter Self-Calibration Timing Diagram .................................................. 313
Figure 6.11-4 Single Mode Conversion Timing Diagram ............................................................. 314
Figure 6.11-5 Single-Cycle Scan on Enabled Channels Timing Diagram ................................... 317
Figure 6.11-6 Continuous Scan on Enabled Channels Timing Diagram ..................................... 318
Figure 6.11-7 A/D Conversion Result Monitor Logics Diagram ................................................... 319
Figure 6.11-8 A/D Controller Interrupt.......................................................................................... 319
Figure 6.11-9 ADC single-end input conversion voltage and conversion result mapping diagram
Figure 6.11-10 ADC differential input conversion voltage and conversion result mapping diagram
Figure 6.12-1 EBI Block Diagram................................................................................................ 334
Figure 6.12-2 Connection of 16-bit EBI Data Width with 16-bit Device ...................................... 335
Figure 6.12-3 Connection of 8-bit EBI Data Width with 8-bit Device ........................................... 337
Figure 6.12-4 Timing Control Waveform for 16bit Data Width.................................................... 339
Figure 6.12-5 Timing Control Waveform for 8bit Data Width...................................................... 340
Figure 6.12-6 Timing Control Waveform for Insert Idle Cycle...................................................... 341
Figure 6.13-1 Flash Memory Control Block Diagram................................................................... 346
Figure 6.13-2 Flash Memory Organization .................................................................................. 348
Figure 6.13-3 Boot Select (BS) for power-on action .................................................................... 349
Figure 6.13-4 Flash Memory Structure ........................................................................................ 351
Figure 6.13-5 ISP Clock Source Control ...................................................................................... 351
Figure 6.13-6 ISPGo Timing Diagram.......................................................................................... 352
Figure 6.13-7 ISP Software Programming Flow .......................................................................... 353
..................................................................................................................................................... 322
..................................................................................................................................................... 323
NuMicro M051
™
Series Technical Reference Manual
- 8 -
Publication Release Date: Sep 14, 2010
Revision V1.2