LIS302DLTR STMicroelectronics, LIS302DLTR Datasheet - Page 27

ACCELEROMETER 3AXIS MEMS 14-LGA

LIS302DLTR

Manufacturer Part Number
LIS302DLTR
Description
ACCELEROMETER 3AXIS MEMS 14-LGA
Manufacturer
STMicroelectronics
Datasheet

Specifications of LIS302DLTR

Featured Product
STM32 Cortex-M3 Companion Products
Axis
X, Y, Z
Acceleration Range
±2.3g, 9.2g
Sensitivity
18mg/digit, 72mg/digit
Voltage - Supply
2.16 V ~ 3.6 V
Output Type
Digital
Bandwidth
100Hz ~ 400Hz Selectable
Interface
I²C, SPI
Mounting Type
Surface Mount
Package / Case
14-LGA
Sensing Axis
X, Y, Z
Acceleration
2 g, 8 g
Digital Output - Number Of Bits
8 bit
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.16 V
Supply Current
0.3 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Digital Output - Bus Interface
I2C, SPI
Shutdown
Yes
For Use With
497-9047 - BOARD DEMO ACCELEROMETER DIL24497-8373 - BOARD EVAL EXTENSION SN250497-8204 - BOARD ADAPTER LIS302SG DIL24497-8203 - BOARD DEMO LIS302SG497-6404 - BOARD EVAL SPZB260 MOD FOR STR9497-6342 - BOARD EVALUATION FOR LIS302DL497-6246 - BOARD EVAL ACCELEROM LIS302ALK497-6227 - BOARD ADAPTER 20DIP LIS3LV02DL497-6226 - BOARD EVAL ACCELEROM LIS3LV02DL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5911-2

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LIS302DL
7.3
Zen bit enables the generation of Data Ready signal for Z-axis measurement channel when
set to 1. The default value is 1.
Yen bit enables the generation of Data Ready signal for Y-axis measurement channel when
set to 1. The default value is 1.
Xen bit enables the generation of Data Ready signal for X-axis measurement channel when
set to 1. The default value is 1.
CTRL_REG2 (21h)
Table 20.
Table 21.
SIM bit selects the SPI Serial Interface Mode. When SIM is ‘0’ (default value) the 4-wire
interface mode is selected. The data coming from the device are sent to SDO pad. In 3-wire
interface mode output data are sent to SDA_SDI pad.
BOOT bit is used to refresh the content of internal registers stored in the flash memory
block. At the device power up the content of the flash memory block is transferred to the
internal registers related to trimming functions to permit a good behavior of the device itself.
If for any reason the content of trimming registers was changed it is sufficient to use this bit
to restore correct values. When BOOT bit is set to ‘1’ the content of internal flash is copied
inside corresponding internal registers and it is used to calibrate the device. These values
are factory trimmed and they are different for every accelerometer. They permit a good
behavior of the device and normally they have not to be changed. At the end of the boot
process the BOOT bit is set again to ‘0’.
FDS bit enables (FDS=1) or bypass (FDS=0) the high pass filter in the signal chain of the
sensor
HP_coeff[2:1]. These bits are used to configure high-pass filter cut-off frequency ft.
SIM
BOOT
FDS
HP FF_WU2
HPFF_WU1
HP coeff2
HP coeff1
SIM
CTRL_REG2 (21h) register
CTRL_REG2 (21h) register description
BOOT
SPI Serial Interface Mode selection. Default value: 0
(0: 4-wire interface; 1: 3-wire interface)
Reboot memory content. Default value: 0
(0: normal mode; 1: reboot memory content)
Filtered Data Selection. Default value: 0
(0: internal filter bypassed; 1: data from internal filter sent to output register)
High Pass filter enabled for FreeFall/WakeUp # 2. Default value: 0
(0: filter bypassed; 1: filter enabled)
High Pass filter enabled for Free-Fall/Wake-Up #1. Default value: 0
(0: filter bypassed; 1: filter enabled)
High pass filter cut-off frequency configuration. Default value: 00
(See table below)
--
FDS
HP_FF_W
U2
HP_FF_W
U1
Register description
HP_coeff2 HP_coeff1
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