ISPPAC-POWR1208-01TN44I LATTICE SEMICONDUCTOR, ISPPAC-POWR1208-01TN44I Datasheet - Page 11

• Manufacturer Part Number: ISPPAC-POWR1208-01TN44I
• Description: ISP CONTROLLER, 1208, TQFP44, 5V
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of ISPPAC-POWR1208-01TN44I

• Input Voltage: 2.7V To 5.5V
• Digital Ic Case Style: TQFP
• No. Of Pins: 44
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Operating Temperature Max: 85°C
• Operating Temperature: RoHS Compliant

Lattice Semiconductor
PLD inputs are from the 12 voltage monitors and four digital inputs. There are four embedded programmable timers
that interface with the PLD, along with an internal programmable oscillator.
The 12 independently programmable voltage monitors each have 384 programmable trip points over the range of
0.680V to 5.932V. Additionally, a 80mV ‘near-ground’ sensing threshold is selectable which allows the voltage mon-
itors to determine if a monitored signal has dropped to ground-level. This feature is especially useful for determin-
ing if a power supply’s output has completely turned off. Figure 2 shows a simplified schematic representation of
one of these monitors.
Figure 2. Voltage Monitors
Each monitor consists of four major subsystems. The core of the monitor is a precision voltage comparator. This
comparator outputs a HIGH signal to the PLD array if the voltage at its positive terminal is greater than that at its
negative terminal, otherwise it outputs a LOW signal. A small amount of hysteresis is provided by the comparator to
reduce the effects of input noise.
The second subsystem is a programmable resistive divider that attenuates the input signal before it is fed into the
comparator. This feature is used to determine the coarse range in which the comparator should trip (e.g. 1.8V, 3.3V,
5V). Twelve possible ranges are available from the input divider network.
The third subsystem is a programmable reference, which may be set to one of 32 possible values scaled in approx-
imately 0.5% increments apart from each other, allowing for fine-tuning of the voltage monitor’s trip points. One
additional setting is provided to implement the 80mV ‘near-ground’ sense setting. This combination of coarse and
fine adjustment supports 384 possible trip-point voltages for a given monitor circuit, in addition to the ‘near-ground’
sense setting. Because each monitor’s reference and input divider settings are completely independent of those of
the other monitor circuits, the user can set any input monitor to any of the 385 available settings.
A comparator will turn on at the specified trip-point and turn off at the specified trip-point minus the hysteresis. The
hysteresis provided by the voltage monitor is a function of the input divider setting and is derived from the differ-
ence in voltage between the current setting and the one immediately below it. The following table lists the typical
hysteresis versus voltage monitor trip-point.
Monitor Voltage
VMON1..VMON12
Attenuator
(12 taps)
Input
Programmable
(32 selections)
Reference
Comparator
Hysteresis
with
11
Sampling
Flip-flop
D
250kHz
Clock
Q
ispPAC-POWR1208P1 Data Sheet
Digital
Filter
OFF
ON/OFF
Digital
ON
Filter
To PLD
Array