ISPPAC-POWR1208-01TN44I LATTICE SEMICONDUCTOR, ISPPAC-POWR1208-01TN44I Datasheet - Page 8

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ISPPAC-POWR1208-01TN44I

Manufacturer Part Number
ISPPAC-POWR1208-01TN44I
Description
ISP CONTROLLER, 1208, TQFP44, 5V
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet

Specifications of ISPPAC-POWR1208-01TN44I

Input Voltage
2.7V To 5.5V
Digital Ic Case Style
TQFP
No. Of Pins
44
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Operating Temperature Max
85°C
Operating Temperature
RoHS Compliant

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ISPPAC-POWR1208-01TN44I
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Lattice Semiconductor
Timing Characteristics
Timing for JTAG Operations
PLD Timing
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
1. t
PD
RST
CKMIN
CKH
CKL
MSS
MSH
DIS
DIH
DOZX
DOV
DOXZ
RSTMIN
PWP
PWE
Symbol
Symbol
PWP
t
t
t
t
CK
MS
DI
DO
represents programming pulse width for a single row of E
Minimum clock period
TCK high time
TCK low time
TMS setup time
TMS hold time
TDI setup time
TDI hold time
TDO float to valid delay
TDO valid delay
TDO valid to float delay
Minimum reset pulse width
Time for a programming operation
Time for an erase operation
t
Combinatorial propagation delay from INx
input to OUTx output.
RESET pulse width
DOZH
t
t
MSS
DIS
t
t
MSH
DIH
t
CKH
t
DOV
t
Parameter
CKL
Parameter
Over Recommended Operating Conditions
t
CKMIN
t
DOXZ
1
2
CMOS cells.
8
Conditions
Conditions
t
t
CK
MS
t
MSS
ispPAC-POWR1208P1 Data Sheet
Program and Erase cycles
executed in Run-Test/Idle
Min.
Min
200
200
15
50
15
50
40
40
40
25
1
t
PWP,
t
PWE
Typ.
Typ.
t
MSS
Max.
Max
200
200
200
100
100
150
Units
Units
ms
ms
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns

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