ISPPAC-POWR1208-01TN44I LATTICE SEMICONDUCTOR, ISPPAC-POWR1208-01TN44I Datasheet - Page 17

• Manufacturer Part Number: ISPPAC-POWR1208-01TN44I
• Description: ISP CONTROLLER, 1208, TQFP44, 5V
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of ISPPAC-POWR1208-01TN44I

• Input Voltage: 2.7V To 5.5V
• Digital Ic Case Style: TQFP
• No. Of Pins: 44
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Operating Temperature Max: 85°C
• Operating Temperature: RoHS Compliant

Lattice Semiconductor
For design entry, the user can select the source for the clock and the PAC-Designer software will calculate the
appropriate delays in an easy-to-select menu format.
The control inputs for Timer1-Timer4 can be driven by any of the 16 PLD macrocell outputs. The reset for the timers
is a function of the Global Reset pin (RESET), a power-on reset or when the timer gate goes low. The waveforms in
Figure 6 show the basic timer start and reset functions. Timer and clock divider values are entered in during the
design phase using PAC-Designer software, simple pull-down menus allow the user to select the clocking mode
and the values for the timers and the PLD clock.
Figure 6. Timer Waveforms
Note that if the clock module is configured as “slave” (i.e. the CLK is an input), the actual time-out of the four timers
is determined by the external clock frequency.
Timer Gate
Timer Output
(From PLD)
(To PLD)
Timer
Start
ProgrammableTimer
Timer Period
Delay
Expired
Timer
17
Reset
Timer
ispPAC-POWR1208P1 Data Sheet
Timer
Start
ProgrammableTimer
Timer Period
Delay
Expired
Timer