KSZ8863RLL-EVAL Micrel Inc, KSZ8863RLL-EVAL Datasheet - Page 12

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KSZ8863RLL-EVAL

Manufacturer Part Number
KSZ8863RLL-EVAL
Description
BOARD EVALUATION FOR KSZ8863RLL
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8863RLL-EVAL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-3868
Micrel, Inc.
November 2009
Pin Number
26
27
28
29
30
31
32
33
34
35
36
37
38
Pin Name
SMRXD33/
REFCLKO_3
SMRXD32
SMRXD31
SMRXD30
SMRXC3
GND
VDDC
SCOL3
SCRS3
INTRN
SCL_MDC
SDA_MDIO
SPIQ
Type
Ipu/O
Ipu/O
lpu/O
lpu/O
lpd/O
Gnd
Opu
I/O
I/O
I/O
I/O
I/O
P
(1)
Description
MLL/FLL: Switch MII receive data bit 3/
RLL: Ouput reference clock in RMII mode.
Strap option: enable auto-negotiation on port 2 (P2ANEN)
PU = enable
PD = disable
Switch MII receive data bit 2
Strap option: Force the speed on port 2 (P2SPD)
Switch MII receive data bit 1
Strap option: Force duplex mode (P2DPX)
negotiation fails. Force port 2 in full duplex mode if P2ANEN = 0.
and auto-negotiation fails. Force port 2 in half duplex mode if P2ANEN = 0.
Switch MII receive data bit 0
Strap option: Force flow control on port 2 (P2FFC)
negotiation result.
Switch MII receive clock.
Digital ground
Ferrite bead and capacitor.
Switch MII collision detect
Switch MII carrier sense
Interrupt
Active Low signal to host CPU to indicate an interrupt status bit is set when
lost link. Refer to register 187 and 188.
SPI slave mode / I
I
MIIM clock input
SPI slave mode: serial data input
I
MIIM: data input/out
Note: an external pull-up is needed on this pin when it is in use.
SPI slave mode: serial data output
Note: an external pull-up is needed on this pin when it is in use.
Strap option: Force flow control on port 1 (P1FFC)
PU = always enable (force) port 1 flow control feature
PD = port 1 flow control feature enable is determined by auto negotiation
result.
1.8 digital VDD input power supply from VDDCO (pin 42) through external
2
2
C master mode: clock output
C master/slave mode: serial data input/output
PD = force port 2 to 10BT if P2ANEN = 0
PU = port 2 default to full duplex mode if P2ANEN = 1 and auto-
PU = always enable (force) port 2 flow control feature.
PU = force port 2 to 100BT if P2ANEN = 0
PD (default) = Port 2 default to half duplex mode if P2ANEN = 1
PD = port 2 flow control feature enable is determined by auto-
Output in PHY MII mode
Input in MAC MII mode
12
2
C slave mode: clock input
KSZ8863MLL/FLL/RLL
M9999-110309-1.1

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