KSZ8863RLL-EVAL Micrel Inc, KSZ8863RLL-EVAL Datasheet - Page 49

• Manufacturer Part Number: KSZ8863RLL-EVAL
• Description: BOARD EVALUATION FOR KSZ8863RLL
• Manufacturer: Micrel Inc

Specifications of KSZ8863RLL-EVAL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-3868

Micrel, Inc.
Register Description
Global Registers (Registers 0 – 15)
Register 0 (0x00): Chip ID0
Register 1 (0x01): Chip ID1 / Start Switch
Register 2 (0x02): Global Control 0
September 2009
7-0
7-4
3-1
Bit
Bit
Bit
0
7
6
5
4
3
2
1
0
Start Switch
New Back-off
Enable
Port 1 Turbo
MII Mode
Flush Dynamic
MAC Table
Flush Static
MAC Table
Pass Flow
Control Packet
Reserved
Reserved
Link Change
Age
Name
Family ID
Name
Chip ID
Revision ID
Name
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RW
RO
RO
RO
Description
Chip family
Description
0x3 is assigned to M series. (73M)
Revision ID
= 1, start the chip when external pins
Description
New back-off algorithm designed for UNH
=1, Enable
=0, Disable
=1, Port 1 is Turbo MII mode
=0, Port 1 is MII mode
=1, enable flush dynamic MAC table for spanning tree application
=disable
=1, enable flush static MAC table for spanning tree application
=dosable,
= 1, switch will not filter 802.1x “flow control” packets
=0, switch will pass 802.1x “flow control” packets
Reserved
Do not change the default value.
Reserved
Do not change the default value.
= 1, link change from “link” to “no link” will cause fast aging
(<800us) to age address table faster. After an age cycle is
complete, the age logic will return to normal aging (about 200 sec).
Note: If any port is unplugged, all addresses will be automatically
aged out.
49
KSZ8863MLL/FLL/RLL
Default
Default
Default
0x88
0x3
0
0
0
0
0
0
0
0
1
-
M9999-091009-1.1