EP3C16F256I7 Altera, EP3C16F256I7 Datasheet - Page 204

• Manufacturer Part Number: EP3C16F256I7
• Description: Cyclone III
• Manufacturer: Altera

High-Speed Differential Interfaces in Cyclone III Devices
Figure 8–12. mini-LVDS Interface with Dedicated Output Buffer on the Left and Right I/O Banks
Figure 8–13. mini-LVDS Interface with External Resistor Network on the Top and Bottom I/O Banks
Note to
(1)
8–14
Cyclone III Device Handbook, Volume 1
The
Figure
Dedicated mini-LVDS
R
S
Cyclone III Device
mini-LVDS Transmitter
Cyclone III Device
and
Trasnmitter
Non-Dedicated
8–13:
R
P
values are pending device characterization.
PPDS I/O Standard Support in Cyclone III Devices
The PPDS specification is used in chip-to-chip applications between the
timing controller and the column drivers on display panels such as LCD
monitor panels and LCD televisions. Cyclone III devices meet the
National Semiconductor Corporation PPDS Interface Specification and
support the PPDS output standard. All the Cyclone III device I/O banks
support the PPDS output standard. The left and right I/O banks support
dedicated PPDS transmitters which run at up to 440 Mbps. On the top
and bottom I/O banks, the PPDS transmitters are supported using
external resistors. The performance target is pending device
characterization. The PPDS standard does not require an input reference
voltage; however, it does require a 100-Ω termination resistor between the
two signals at the input buffer.
Resistor Network
R S
R S
R P
50 Ω
50 Ω
50 Ω
50 Ω
100 Ω
100 Ω
Altera Corporation-Preliminary
mini-LVDS Receiver
mini-LVDS Receiver
March 2007