NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 112

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

Functional Description
112
Table 5-3. Advanced TCO Functionality
Note: For a complete description on various commands, see the Total Cost of Ownership (TCO) System
Management Bus Interface Application Note (AP-430).
Transmit Command during Normal Operation
To serve a transmit request from the TCO controller, the ICH6 LAN controller first completes the
current transmit DMA, sets the TCO request bit in the PMDR register (see
responds to the TCO controller’s transmit request. Following the completion of the TCO transmit
DMA, the LAN controller increments the Transmit TCO statistic counter (described in
Section
nominal transmit statistic counters, clears the TCO request bit in the PMDR register, and resumes
its normal transmit flow. The receive flow is not affected during this entire period of time.
Receive TCO
The ICH6 LAN controller supports receive flow towards the TCO controller. The ICH6 can
transfer only TCO packets, or all packets that passed MAC address filtering according to its
configuration and mode of operation as detailed below. While configured to transfer only TCO
packets, it supports Ethernet type II packets with optional VLAN tagging.
Force TCO Mode: While the ICH6 is in the force TCO mode, it may receive packets (TCO or all)
directly from the TCO controller. Receiving TCO packets and filtering level is controlled by the set
Receive enable command from the TCO controller. Following a reception of a TCO packet, the
ICH6 increments its nominal Receive statistic counters as well as the Receive TCO counter.
Dx>0 Power State: While the ICH6 is in a powerdown state, it may receive TCO packets or all
directly to the TCO controller. Receiving TCO packets is enabled by the set Receive enable
command from the TCO controller. Although TCO packet might match one of the other wake up
filters, once it is transferred to the TCO controller, no further matching is searched for and PME is
not issued. While receive to TCO is not enabled, a TCO packet may cause a PME if configured to
do so (setting TCO to 1 in the filter type).
D0 Power State: At D0 power state, the ICH6 may transfer TCO packets to the TCO controller. At
this state, TCO packets are posted first to the host memory, then read by the ICH6, and then posted
back to the TCO controller. After the packet is posted to TCO, the receive memory structure (that is
occupied by the TCO packet) is reclaimed. Other than providing the necessary receive resources,
there is no required device driver intervention with this process. Eventually, the ICH6 increments
the receive TCO static counter, clears the TCO request bit, and resumes normal control.
D0 nominal
Dx (x>0)
Force TCO Mode
Power State
8.2.14). Following the completion of the transmit operation, the ICH6 increments the
Transmit
Set Receive TCO Packets
Receive TCO Packets
Read ICH6 status (PM & Link state)
Force TCO Mode
D0 functionality plus:
Read PHY registers
Dx functionality plus:
Configuration commands
Read/Write PHY registers
TCO Controller Functionality
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Section
8.2), and then