NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 755

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

Intel
Table 22-21. (Power Sequencing and Reset Signal Timings (Sheet 2 of 2)
®
I/O Controller Hub 6 (ICH6) Family Datasheet
NOTES:
1. The V5REF supply must power up before its associated 3.3 V supply within 0.7 V, and must power down after
2. The associated 3.3 V and 1.5 V supplies are assumed to power up or down ‘together’. If the integrated
3. The VccSus supplies must never be active while the VccRTC supply is inactive.
4. (Mobile Only) – a ) VccLan3_3 must power up before VccLAN1_5 or after VccLAN1_5 within 0.7 V, b )
5. (Mobile Only) - Vcc or VccLAN supplies must never be active while the VccSus supplies are inactive, and the
6. If the integrated Vcc2_5 voltage regulator is not used: a ) Vcc3_3 must power up before Vcc2_5 or after
7. a ) Vcc1_5 must power up before V_CPU_IO or after V_CPU_IO within 0.3 V, b ) V_CPU_IO must power
8. INIT# value determined by value of the CPU BIST Enable bit (Chipset Configuration Register Offset 3414h:
9. These transitions are clocked off the internal RTC. 1 RTC clock is approximately 32 uS.
Sym
t217
t218
t228
t229
the 3.3 V supply within 0.7V. See
VccSus1_5 voltage regulator is not used: a ) VccSus3_3 must power up before VccSus1_5 or after
VccSus1_5 within 0.7 V, b ) VccSus1_5 must power down before VccSus3_3 or after VccSus3_3 within 0.7 V.
VccLAN1_5 must power down before VccLAN3_3 or after VccLAN3_3 within 0.7V.
Vcc supplies must never be active while the VccLAN supplies are inactive.
Vcc2_5 within 0.7 V, b ) Vcc2_5 must power down before Vcc3_3 or after Vcc3_3 within 0.7 V.
down before Vcc1_5 or after Vcc1_5 within 0.7 V.
bit 2).
PWROK and VRMPWRGD active and
SYS_RESET# inactive to SUS_STAT# inactive
and Processor I/F signals latched to strap value
SUS_STAT# inactive to PLTRST# and
PCIRST# inactive
ACZ_RST# active low pulse width
ACZ_RST# inactive to ACZ_BIT_CLK startup
delay
Parameter
Section 2.22.3.1
for details.
162.8
Min
32
2
1
Max
38
3
–
–
Electrical Characteristics
RTCCLK
RTCCLK
Units
us
ns
22-20
22-21
22-23
22-24
22-25
22-26
22-20
22-21
22-23
22-24
22-25
22-26
Fig
Notes
8, 9
9
755