NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 684

no-image

NH82801FBM S L89K

Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801FBM S L89K

Lead Free Status / RoHS Status
Compliant
PCI Express* Configuration Registers
19.1.14
684
SSTS—Secondary Status Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset:
Default Value:
10:9
Bit
4:0
15
14
13
12
11
8
7
6
5
Detected Parity Error (DPE) — R/WC.
0 = No error.
1 = The port received a poisoned TLP.
Received System Error (RSE) — R/WC.
0 = No error.
1 = The port received an ERR_FATAL or ERR_NONFATAL message from the device.
Received Master Abort (RMA) — R/WC.
0 = Unsupported Request not received.
1 = The port received a completion with “Unsupported Request” status from the device.
Received Target Abort (RTA) — R/WC.
0 = Completion Abort not received.
1 = The port received a completion with “Completion Abort” status from the device.
Signaled Target Abort (STA) — R/WC.
0 = Completion Abort not sent.
1 = The port generated a completion with “Completion Abort” status to the device.
Secondary DEVSEL# Timing Status (SDTS): Reserved per PCI Express* Base Specification .
Data Parity Error Detected (DPD) — R/WC.
0 = Conditions below did not occur.
1 = Set when the BCTRL.PERE (D28:FO/F1/F2/F3:3E: bit 0) is set, and either of the following two
Secondary Fast Back to Back Capable (SFBC): Reserved per PCI Express* Base Specification .
Reserved
Secondary 66 MHz Capable (SC66): Reserved per PCI Express* Base Specification .
Reserved
• Port receives completion marked poisoned.
• Port poisons a write request to the secondary side.
conditions occurs:
1E–1Fh
0000h
Intel
Description
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
16 bits
R/WC

Related parts for NH82801FBM S L89K