MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 32

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Introduction
1-2
• Four General-Purpose Timers
• Two Independent DMAs (IDMAs)
• System Integration Module (SIM60)
• Interrupts
• Communications Processor Module (CPM)
• Four Baud Rate Generators
—Glueless Interface to DRAM Single In-Line Memory Modules (SIMMs), Static Ran-
—Four CAS lines, Four WE lines, One OE line
—Boot Chip Select Available at Reset (Options for 8-, 16-, or 32-Bit Memory)
—Special Features for MC68040 Including Burst Mode Support
—Superset of MC68302 Timers
—Four 16-Bit Timers or Two 32-Bit Timers
—Gate Mode Can Enable/Disable Counting
—Single Address Mode for Fastest Transfers
—Buffer Chaining and Auto Buffer Modes
—Automatically Performs Efficient Packing
—32-Bit Internal and External Transfers
—Bus Monitor
—Double Bus Fault Monitor
—Spurious Interrupt Monitor
—Software Watchdog
—Periodic Interrupt Timer
—Low Power Stop Mode
—Clock Synthesizer
—Breakpoint Logic Provides On-Chip Hardware Breakpoints
—External Masters May Use On-Chip Features Such As Chip Selects
—On-Chip Bus Arbitration with No Overhead for Internal Masters
—IJTAG Test Access Port
—Seven External IRQ Lines
—12 Port Pins with Interrupt Capability
—16 Internal Interrupt Sources
—Programmable Priority Between SCCs
—Programmable Highest Priority Request
—RISC Controller
—Many New Commands (e.g., Graceful Stop Transmit, Close RxBD)
—224 Buffer Descriptors
—Supports Continuous Mode Transmission and Reception on All Serial Channels
—2.5 Kbytes of Dual-Port RAM
—14 Serial DMA (SDMA) Channels
—Three Parallel I/O Registers with Open-Drain Capability
—Each Serial Channel Can Have Its Own Pins (NMSI Mode)
dom-Access Memory (SRAM), Electrically Programmable Read-Only Memory
(EPROM), Flash EPROM, etc.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com