MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 432

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MC68EN360AI25VL

Manufacturer Part Number
MC68EN360AI25VL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC68EN360AI25VL

Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Lead Free Status / RoHS Status
Compliant

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Baud Rate Generators (BRGs)
DIV16—BRG Clock Prescaler Divide by 16
7.9.3 UART Baud Rate Examples
For synchronous communication using internal baud rate generator, the BRGO output clock
must never be faster than the SyncCLK frequency divided by 2. Produced in the clock syn-
thesizer in the SIM60, SyncCLK is the frequency used internally by the synchronization cir-
cuitry in the SCCs, SMCs, and SPI. It defaults to the main system frequency (e.g., 25 MHz).
Thus, with a 25-MHz system where the SyncCLK is the same as the main system frequency,
the maximum BRGO output clock rate is 12.5 MHz.
The user should program the UART to 16 oversampling (RDCR and TDCR bits in the gen-
eral SCC mode register) when using the SCC as a UART. (On the QUICC, 8 and 32
options are also available.) Assuming 16 oversampling is chosen in the UART, a data rate
of 25MHz
Putting this together, the following formula for calculating the bit rate based on a particular
BRG configuration for a UART: async baud rate = (BRGCLK or CLK2 or CLK6)
divider + 1)
and TDCR bits in the general SCC mode register).
Table 7-3 lists examples of typical bit rates of asynchronous communication. Note that for
this mode, the internal clock rate is assumed to be 16 the baud rate.
7-108
NOTE: All values are decimal.
115200
The BRG clock prescaler bit selects a divide-by-1 or divide-by-16 prescaler for the clock
divider input.
Rates
19200
38400
57600
Baud
1200
2400
4800
9600
150
300
600
50
75
Div16
Table 7-4. Typical Baud Rates of Asynchronous Communication
16 = 1.5625 Mbits/sec is the maximum possible UART speed.
1
1
1
1
0
0
0
0
0
0
0
0
0
(1 or 16 depending on the DIV16 bit)
1561
1040
2082
1040
Div
520
259
520
259
129
64
32
21
10
20
Freescale Semiconductor, Inc.
Frequency
For More Information On This Product,
149.954
113636
Actual
300.48
600.09
1200.7
2399.2
4807.7
9615.4
19231
37879
56818
50.02
75.05
MC68360 USER’S MANUAL
Go to: www.freescale.com
QUICC System Frequency (MHz)
Div16
1
1
1
1
0
0
0
0
0
0
0
0
0
1952
1301
2603
1301
Div
650
324
650
324
162
80
40
26
13
25
(8 or 16 or 32 according to the RDCR
Frequency
4807.69
111607
Actual
2400.1
9585.9
19290
38109
57870
300.5
1200
150
600
50
75
Div16
1
1
1
1
0
0
0
0
0
0
0
0
0
1919
1279
2559
1279
Div
639
319
639
319
159
79
39
26
12
24.5760
Frequency
118154
Actual
19200
38400
56889
1200
2400
4800
9600
150
300
600
50
75
(clock

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