MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 807

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Applications
9.8.3.2 CONFIGURING THE MEMORY CONTROLLER. The following register initializa-
tions are for the memory controller.
The global memory register (GMR) should be configured as follows:
9-87
The RFCNT bits may be set as desired. At 25 MHz, an RFCNT value of 24 (decimal) gives
NOTE: MA11–MA9 not used.
SYSTEM BUS AND
QUICC-GENERATED SIGNALS
AMUX
D15–D0
CAS2
CAS3
R/W
CAS0
CAS1
RAS1
D31–D16
R/W
RAS1
A12
A13
A14
A15
COLUMN = A ROW = B
A2
A3
A4
A5
Figure 9-33. 1-Mbyte DRAM Bank—32 Bits Wide
MC74F157
A0
A1
A2
A3
B0
B1
B2
B3
SEL
Freescale Semiconductor, Inc.
OE
Y0
Y1
Y2
Y3
For More Information On This Product,
MA0
MA1
MA2
MA3
MC68360 USER’S MANUAL
Go to: www.freescale.com
A6
A7
A8
A9
A16
A17
A18
A19
A0
A1
A2
A3
B0
B1
B2
B3
DQ15–DQ0
RAS
UCAS
DQ15–D0
RAS
LCAS
W
UCAS
LCAS
W
MC74F157
256K 16 BIT
LOW-ORDER
256K 16 BIT
BYTES 2 & 3
MCM54260
HIGH-ORDER
SEL
BYTES 0 & 1
MCM54260
DRAM
MUXED ADDRESS BUS
WORD
DRAM
WORD
OE
Y0
Y1
Y2
Y3
MA6
MA7
MA4
MA5
A0
A1
A2
A3
A4
A5
A6
A7
A8
A8
A0
A1
A2
A3
A4
A5
A6
A7
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
A10
A11
A20
A21
A0
A1
A2
A3
B0
B1
B2
B3
MC74F157
SEL
OE
Y0
Y1
Y2
Y3
MA8
MA9
MA10
MA11