PNX1301EH NXP Semiconductors, PNX1301EH Datasheet - Page 237

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PNX1301EH

Manufacturer Part Number
PNX1301EH
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PNX1301EH

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table. The simplest way to generate these values in com-
mon computer languages such as C is as follows:
1. Generate the Increment Value as a floating point
2. Multiply the Increment Value by 65536
3. Convert the result to a Long Integer (32 bits). The up-
4. Store the 32-bit Long integer in the parameter table as
For YUV 4:2:2 or YUV 4:2:0 input data and RGB output
data, the scaling factor for U and V must be twice the
scaling factor for Y, unless YUV4:2:2 sequencing is used
for speed. In YUV 4:2:2 or YUV 4:2:0 data, the horizontal
components of U and V are half those of Y. The U and V
must be upscaled by 2 to generate a YUV 4:4:4 format
internally for YUV to RGB conversion. For YUV 4:1:1 in-
put data, the U and V components must be upscaled by
a factor of 4 to generate the required internal YUV 4:4:4
format.
The Start Fraction defines the starting value in the scal-
ing counter for each line. It is a 16-bit, two’s complement
fractional value between -0.500 and 0.49999+. The Start
Fraction allows the input data to be offset by up to half a
pixel, referred to the input pixel grid. It is ‘0’ for Y and for
UV co-sited data, and is set to ‘-0.25’ (C000) for inter-
spersed to co-sited conversion of U and V data. The ‘-
0.25’ value effectively shifts the U and V data toward the
start of the line by 1/4 pixel, the amount required for con-
version.
The Alpha 1 and Alpha 0 values are 8-bit fields within the
16-bit Alpha field. These values are loaded into the Alpha
1 and Alpha 0 registers, resp., for use by RGB 15+α and
YUV 4:2:2+α overlay formats in alpha blending.
The Overlay start and end pixels and lines define the
start and end pixels and lines within the output image for
the overlay. The first pixel of the overlay image will be
blended with the pixel at the Overlay Start Pixel and
Overlay Start Line in the output image.
14.6.11.3 Control word format
The Control word provides bit fields which affect the hor-
izontal filtering operation. The format of the Control word
is as follows.
Bits Name
15
14
13
12
11
10
number = Input Width / Output Width
per 16 bits of the Long integer will be the Integer in-
crement value, and the lower 16 bits will be the Frac-
tional value
the combined Integer and Fractional increment values
Bypass
422SEQ
YUV420
OEN
PCI
BEN
Function
Normally set to 0 to enable filtering.
Can be set to 1 to accomplish data
move without filtering.
4:2:2 Sequence bit. Used with YUV
4:2:2 output
YUV 4:2:0 input format
Overlay enable. Valid only for PCI out-
put
PCI output enable. Otherwise SDRAM
output
Bit mask enable. Valid only for PCI
7-6 OFRM
3-0 RGB
The 422SEQ bit controls the internal sequencing of the
YUV to RGB operation. It is set to ‘1’ when YUV 4:2:2
output is selected. When 422SEQ is ‘0’, normal RGB out-
put is assumed. In this mode, the input is YUV 4:2:2 or
YUV 4:2:0, and the output is RGB. To generate the RGB
output, the YUV 4:2:2 or YUV 4:2:0 input must be up-
scaled to YUV 4:4:4 before conversion to RGB. This
means the scaling factor for U and V must be twice the
scaling factor for Y. The internal sequencing of the filter
in this case is UVY, UVY, UVY to generate RGB, RGB,
RGB. For YUV 4:2:2 output formats, no upscaling of U
and V is required. In this case, the 422SEQ bit is set to
one, and the filter sequence is UVYY, UVYY, UVYY.
The 422SEQ bit can be set in RGB output mode to de-
crease the processing time for the image at the expense
of color bandwidth and some corresponding decrease in
picture quality. If the 422SEQ bit is set for RGB output,
the filter will perform the UVYY sequence. In this case,
the U and V components are not upscaled by 2, and the
YUV to RGB converter updates its U and V components
every other pixel. In the normal case (422SEQ=0), it
takes 6 clock cycles to generate two RGB pixels. In the
422SEQ=1 case, it takes 4 clock cycles to generate two
RGB pixels, reducing processing time by 33%.
The YUV420 bit indicates that the input data is in YUV
4:2:0 format. In YUV 4:2:0 format, the U and V compo-
nents are half the width and half the height of the Y data.
YUV 4:2:0 data is normally converted to YUV 4:2:2 data
by a separate vertical upscaling by a factor of 2.0 for best
quality. The YUV420 bit allows using YUV 4:2:0 data di-
rectly but with some quality degradation. When YUV420
is set, the ICP up scales the data vertically by line dupli-
cation. Each U and V input line is used twice. The sepa-
PRELIMINARY SPECIFICATION
5
4
9
8
GETB
OLLE
CHK
LE
output
Large down scaling bit. Picks five
input pixels nearest 5 output pixels
and passes to filter.
Equivalent to filter bypass + 5-tap filter
of output pixels. LSB value = 0 for fil-
tering.
Overlay little endian enable
Overlay format
0 = RGB 24+α
1 = RGB 15+α
2 = YUV 4:2:2+α
Chroma keying enable
RGB output little endian enable
RGB Output Code
0 = YUV 4:2:2+α
1 = YUV 4:2:2
2 = RGB 24+α
3 = RGB 24 packed
4 = RGB 8A (RGB 233)
5 = RGB 8R (RGB 332)
6 = RGB15+α
7 = RGB 16
Image Coprocessor
14-27

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