PNX1301EH NXP Semiconductors, PNX1301EH Datasheet - Page 477

• Manufacturer Part Number: PNX1301EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1301EH

• Lead Free Status / RoHS Status: Not Compliant

PNX1300/01/02/11 Data Book
ufloat
SYNTAX
FUNCTION
DESCRIPTION
and writes the result into rdest. Rounding is according to the IEEE rounding mode bits in PCSW. If
an IEEE exception, such as inexact, the corresponding exception flags in the PCSW are set. The PCSW exception
flags are sticky: the flags can be set as a side-effect of any floating-point operation but can only be reset by an explicit
writepcsw
other floating-point compute operations update the PCSW at the same time, the net result in each exception flag is the
logical OR of all simultaneous updates ORed with the existing PCSW value for that exception flag.
modification of the destination register. If the LSB of rguard is 1, rdest and the exception flags in PCSW are written;
otherwise, rdest is not changed and the operation does not affect the exception flags in PCSW.
EXAMPLES
A-179
r30 = 3
r40 = 0xffffffff (4294967295)
r10 = 0, r50 = 0xfffffffd
r20 = 1, r50 = 0xfffffffd
r60 = 0x7fffffff (2147483647)
r70 = 0x80000000 (2147483648)
r80 = 0x7ffffff1 (2147483633)
The
The
The
[ IF rguard ] ufloat rsrc1 → rdest
if rguard then {
}
rdest ← (float) ((unsigned long)rsrc1)
ufloat
ufloatflags
ufloat
Initial Values
operation. The update of the PCSW exception flags occurs at the same time as rdest is written. If any
operation converts the unsigned integer value in rsrc1 to single-precision IEEE floating-point format
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
PRELIMINARY SPECIFICATION
operation computes the exception flags that would result from an individual
ufloat r30 → r100
ufloat r40 → r105
IF r10 ufloat r50 → r110
IF r20 ufloat r50 → r115
ufloat r60 → r117
ufloat r70 → r120
ufloat r80 → r122
Operation
Convert unsigned integer to floating-point
r100 ← 0x40400000 (3.0)
r105 ← 0x4f800000 (4.294967296e+9), INX flag set
no change, since guard is false
r115 ← 0x4f800000 (4.294967296e+9), INX flag set
r117 ← 0x4f000000 (2.147483648e+9), INX flag set
r120 ← 0x4f000000 (2.147483648e+9)
r122 ← 0x4f000000 (2.147483648e+9), INX flag set
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
ifloat ifloatrz ufloatrz
ifixieee ufloatflags
Philips Semiconductors
Result
ATTRIBUTES
SEE ALSO
ufloat
ufloat
.
127
1, 4
falu
No
—
causes
1
3