EP4CE55F23C7 Altera, EP4CE55F23C7 Datasheet - Page 137

• Manufacturer Part Number: EP4CE55F23C7
• Description: IC CYCLONE IV FPGA 55K 484FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV Er

Specifications of EP4CE55F23C7

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2340000
• Number Of I /o: 324
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Chapter 6: I/O Features in Cyclone IV Devices
High-Speed I/O Standards Support
Figure 6–12. Cyclone IV Devices LVDS Interface with True Output Buffer on the Right I/O Banks
BLVDS I/O Standard Support in Cyclone IV Devices
© December 2010 Altera Corporation
Transmitting Device
txout -
txout +
Figure 6–12
LVDS output and input buffers.
Figure 6–13
using two single-ended output buffers and external resistors.
Figure 6–13. LVDS Interface with External Resistor Network on the Top and Bottom I/O
Banks
Note to
(1) R
The BLVDS I/O standard is a high-speed differential data transmission technology
that extends the benefits of standard point-to-point LVDS to multipoint configuration
that supports bidirectional half-duplex communication. BLVDS differs from standard
LVDS by providing a higher drive to achieve similar signal swings at the receiver
while loaded with two terminations at both ends of the bus.
50 Ω
50 Ω
S
Figure
= 120 . R
(Note 1)
LVDS Transmitter
100 Ω
Cyclone IV Device
rxin +
rxin -
6–13:
shows a point-to-point LVDS interface using Cyclone IV devices true
shows a point-to-point LVDS interface with Cyclone IV devices LVDS
Emulated
P
= 170 .
Input Buffer
Family Logic
Cyclone IV Device
Cyclone IV
Device
Array
Resistor Network
R S
R S
R P
Output Buffer
txout +
txout -
50 Ω
50 Ω
50 Ω
50 Ω
100 Ω
Cyclone IV Device Handbook, Volume 1
rxin +
rxin -
100 Ω
LVDS Receiver
Receiving Device
6–29