EP4CE55F23C7 Altera, EP4CE55F23C7 Datasheet - Page 408

• Manufacturer Part Number: EP4CE55F23C7
• Description: IC CYCLONE IV FPGA 55K 484FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV Er

Specifications of EP4CE55F23C7

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2340000
• Number Of I /o: 324
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

3–18
Figure 3–8. Write Transaction Waveform—Use the same control signal for all the channels Option Disabled
Notes to
(1) In this waveform example, you want to write to only the transmitter portion of the channel.
(2) In this waveform example, the number of channels controlled by the dynamic reconfiguration controller (the ALTGX_RECONFIG instance) is two
Cyclone IV Device Handbook, Volume 2
and that the tx_vodctrl control port is enabled.
Figure
rx_tx_duplex_sel [1:0]
3–8:
tx_vodctrl [5:0]
1
1
reconfig_clk
write_all
Figure 3–8
for all the channels option disabled.
Simultaneous write and read transactions are not allowed.
Read Transaction
The read transaction in Method 3 is identical to that in Method 2. Refer to
Transaction” on page
This is the slowest method. You have to write all the PMA settings for all channels
even if you may only be changing one parameter on the channel. Altera recommends
using the logical_channel_address method for time-critical applications.
For each method, you can additionally reconfigure the PMA setting of both
transmitter and receiver portion, transmitter portion only, or receiver portion only of
the transceiver channel. For more information, refer to
Controller Port List” on page
selecting the Use 'rx_tx_duplex_sel' port to enable RX only, TX only or duplex
reconfiguration option on the Error checks tab of the ALTGX_RECONFIG
MegaWizard Plug-In Manager.
Figure 3–9
set in analog reconfiguration mode. For the port information, refer to the
Reconfiguration Controller Port List” on page
busy
(1)
(2)
6'b111111
2'b00
shows a write transaction waveform with the Use the same control signal
shows the ALTGX_RECONFIG connection to the ALTGX instances when
3–15.
3–3. You can enable the rx_tx_duplex_sel port by
6'b111011
2'b10
3–3.
Chapter 3: Cyclone IV Dynamic Reconfiguration
“Dynamic Reconfiguration
© December 2010 Altera Corporation
Dynamic Reconfiguration Modes
“Dynamic
“Read