MC68030RC40C Freescale Semiconductor, MC68030RC40C Datasheet - Page 21

• Manufacturer Part Number: MC68030RC40C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC40C

• Processor Type: M680x0 32-Bit
• Speed: 40MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 40MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

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Figure
Asynchronous Late Retry.: ....................................................
Assertion of IPEND ..............................................................
Synchronous Late Retry .......................................................
Single-Wire Bus Arbitration Timing Diagram ..........................
Reset Operation Flowchart ....................................................
Interrupt Recognition Examples..i ..........................................
Interrupt
Special Status Word (SSW) ...................................................
Translation Table Tree ..........................................................
Address Translation General Flowchart ..................................
Short-Format Page Descriptor and Short-Format Early
Long-Word Operand R e q u e s t - Late BERR on Third Access ....
Long-Word Operand R e q u e s t - BERR on Second Access ........
Late Retry Operation for a Burst ............................................
Halt Operation Timing ..........................................................
Bus Synchronization Example.; .............................................
Bus Arbitration Flowchart for Single Request ..........................
Bus Arbitration Operation Timing ..........................................
Bus Arbitration State Diagram ...............................................
Bus Arbitration Operation (Bus Inactive) .................................
Initial Reset Operation Timing ...............................................
Processor-Generated Reset Operation ....................................
Interrupt Pending Procedure .................................................
Examples of Interrupt Recognition and Instruction Boundaries..
Breakpoint
RTE Instruction for Throwaway Four-Word Frames .................
MMU Block Diagram ............................................................
MMU Programming Model ...................................................
Example Translation Table Tree ............................................
Example Translation Table Tree Layout in Memory .............. ...
Derivation of Table Index Fields ............................................
Example Translation Tree Using Different Format Descriptors..
Root Pointer Descriptor Format .............................................
Short-Format Table Descriptor ..............................................
Long-Format Table Descriptor ...............................................
Termination Page Descriptor ..............................................
LIST OF ILLUSTRATIONS (Continued)
Exception
Instruction Flowchart ......................................... :.
Processing
MC68030 USER'S MANUAL
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Flowchart
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MOTOROLA
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