MC68030RC40C Freescale Semiconductor, MC68030RC40C Datasheet - Page 395

• Manufacturer Part Number: MC68030RC40C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC40C

• Processor Type: M680x0 32-Bit
• Speed: 40MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 40MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

0
10-8
10.1.4.3 COPROCESSOR INTERFACE REGISTER SELECTION.
A20-A31 and A5-A12 of the MC68030 address bus are always zero during
The MC68010 can emulate coprocessor access cycles in CPU space using the
that the value on the MC68030 address bus during a coprocessor access
The individual registers are described in detail in 10.3 COPROCESSOR IN-
TERFACE REGISTER SET.
coding the MC68030 function code signals and bits A13-A19 of the address
code signals and A16-A19 indicate a coprocessor access; A13-A15 indicate
which of the possible seven coprocessors (001-111) is being accessed. Bits
a coprocessor access.
addresses a unique region of the main processor's CPU address space, Sig-
register map for the M68000 coprocessor interface is shown in Figure 10-5.
bus provides a unique chip select signal for a given coprocessor. The function
MOVES instruction.
nals AO-A4 of the MC68030 address bus select the ClR being accessed. The
Figure 10-4, Coprocessor Address Map in MC68030 CPU Space
CPU
SPACE ADDRESS
20000
22000
24000
2E000
2ED1F
2D01F
2201F
MC68030 USER'S MANUAL
INTERFACE REGISTER SET
INTERFACE REGISTER SET
INTERFACE REGISTER SET
RESERVED
RESERVED
RESERVED
I
•
l - - COPROCESSOR WITH
~ - COPROCESSOR WITH
.
ADDRESS SPACE FOR
ADDRESS SPACE FOR
UNIT
ADDRESS SPACE FOR
Cp-ID
Cp-ID = 7
MEMORY
MANAGEMENT
= I
Figure 10-4 shows
MOTOROLA