PCA9665D,112 NXP Semiconductors, PCA9665D,112 Datasheet - Page 41

• Manufacturer Part Number: PCA9665D,112
• Description: IC CNTRLR PARALLEL/I2C 20-SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA9665D,112

• Controller Type: I²C Bus Controller
• Interface: I²C
• Voltage - Supply: 2.3 V ~ 3.6 V
• Current - Supply: 100µA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935279242112; PCA9665D; PCA9665D

NXP Semiconductors
PCA9665_3
Product data sheet
Fig 13. Format and states in the Slave Receiver Buffered mode (MODE = 1)
(1) See
(2) Defined state when the number of bytes received is equal to the value in I2CCOUNT register and LB = 0.
(3) Defined state when the number of bytes received is equal to the value in I2CCOUNT register and LB = 1.
(4) Number of bytes received is lower than I2CCOUNT.
reception of
own slave address
and one or more
data bytes;
all are Acknowledged
last data byte received is
Not Acknowledged
arbitration lost as MST and
addressed as slave
reception of the
General Call address
and one or more
data bytes
last data byte received is
Not Acknowledged
arbitration lost as MST and
addressed as slave by
General Call
DATA
Table
from master to slave
from slave to master
40.
A
If the LB bit is reset (logic 0), the PCA9665 will return an acknowledge for all the bytes that
will be received. The maximum number of bytes that are received in a single sequence is
defined by BC[6:0] in I2CCOUNT register as shown in
If the LB bit is set (logic 1) during a transfer, the PCA9665 will return a not acknowledge
(logic 1) on SDA after receiving the last byte. If the AA bit is reset, the I
machine does not respond to its own slave address. However, the I
monitored and address recognition may be resumed at any time by setting AA. This
means that the AA bit may be used to temporarily isolate the PCA9665 from the I
n
any number of data bytes and
their associated Acknowledge bits
S
S
This number (contained in I2CSTA) corresponds
to a defined state of the I
CALL = 00h
GENERAL
SLA
W
W
2
C-bus.
Rev. 03 — 12 August 2008
D0h
D8h
60h
68h
A
A
A
A
(1)
P or S
P or S
F8h on STOP
F8h on STOP
DATA
DATA
A
A
(4)
(4)
DATA
DATA
Fm+ parallel bus to I
Table
E0h
80h
(2)
(2)
A
A
39.
DATA
DATA
2
C-bus is still
PCA9665
E0h
E8h
80h
88h
2
© NXP B.V. 2008. All rights reserved.
(2)
(3)
(2)
(3)
2
A
A
A
A
C-bus state
002aab661
C-bus controller
on STOP
on STOP
P or S
P or S
P or S
P or S
A0h
F8h
A0h
F8h
2
C-bus.
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