PCA9665D,112 NXP Semiconductors, PCA9665D,112 Datasheet - Page 57

• Manufacturer Part Number: PCA9665D,112
• Description: IC CNTRLR PARALLEL/I2C 20-SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA9665D,112

• Controller Type: I²C Bus Controller
• Interface: I²C
• Voltage - Supply: 2.3 V ~ 3.6 V
• Current - Supply: 100µA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935279242112; PCA9665D; PCA9665D

NXP Semiconductors
Table 46.
PCA9665_3
Product data sheet
Status
code
(I2CSTA)
F8h
70h
78h
FCh
00h
On hardware or
Bus error
Bus error
Illegal value in
I2CCOUNT
Bus error during
master or slave mode,
due to illegal START
or STOP condition
Status of the I
and the PCA9665
software reset or
STOP
SDA stuck LOW
SCL stuck LOW
Miscellaneous states
8.8.1 I2CSTA = F8h
8.8.2 I2CSTA = 00h
8.8.3 I2CSTA = 70h
8.8 Miscellaneous states
There are four I2CSTA codes that do not correspond to a defined PCA9665 state (see
Table
This status code indicates that the PCA9665 is in an idle state and that no relevant
information is available because the serial interrupt flag, SI, is not yet set. This occurs on a
STOP condition or during a hardware or software reset event and when the PCA9665 is
not involved in a serial transfer.
This status code indicates that a bus error has occurred during a serial transfer. A bus
error is caused when a START or STOP condition occurs at an illegal position in the
format frame. Examples of such illegal positions are during the serial transfer of an
address byte, a data byte, or an acknowledge bit. A bus error may also be caused when
external interference disturbs the internal PCA9665 signals. When a bus error occurs, SI
is set. To recover from a bus error, the microcontroller must send an external hardware or
software reset signal to reset the PCA9665.
This status code indicates that the SDA line is stuck LOW when the PCA9665, in master
mode, is trying to send a START condition.
2
C-bus
46). These are discussed in
Application software response
To/from I2CDAT
No I2CDAT action 1
No I2CDAT action 0
No I2CDAT action 0
No I2CDAT action No I2CCON action
No I2CDAT action No I2CCON action
No I2CDAT action No I2CCON action
No I2CDAT action No I2CCON action
Rev. 03 — 12 August 2008
To I2CCON
STA STO SI
X
X
X
Section 8.8.1
0
0
0
AA
X
0
1
through
MODE
X
X
X
Fm+ parallel bus to I
Next action taken by PCA9665
Go into master mode; send START
No recognition of own slave
address. General Call address will
be recognized if GC = 1.
Will recognize own slave address.
General Call address will be
recognized if GC = 1.
Hardware or software reset of the
PCA9665 (requires reset to return
to state F8h)
Hardware or software reset of the
PCA9665 (requires reset to return
to state F8h)
Program a valid value in
I2CCOUNT: BC[6:0] between 1 and
68.
Hardware or software reset of the
PCA9665 (requires reset to return
to state F8h)
Section
8.8.4.
PCA9665
© NXP B.V. 2008. All rights reserved.
2
C-bus controller
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