PCA9665D,112 NXP Semiconductors, PCA9665D,112 Datasheet - Page 6

• Manufacturer Part Number: PCA9665D,112
• Description: IC CNTRLR PARALLEL/I2C 20-SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA9665D,112

• Controller Type: I²C Bus Controller
• Interface: I²C
• Voltage - Supply: 2.3 V ~ 3.6 V
• Current - Supply: 100µA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935279242112; PCA9665D; PCA9665D

NXP Semiconductors
7. Functional description
PCA9665_3
Product data sheet
7.1 General
7.2 Internal oscillator
7.3 Registers
The PCA9665 acts as an interface device between standard high-speed parallel buses
and the serial I
data transfer between the I
byte or buffered basis, using either an interrupt or polled handshake.
The PCA9665 contains an internal 28.5 MHz oscillator which is used for all I
The oscillator requires up to 550 s to start-up after ENSIO bit is set to ‘1’.
The PCA9665 contains eleven registers which are used to configure the operation of the
device as well as to send and receive serial data. There are four registers that can be
accessed directly and seven registers that are accessed indirectly by setting a register
pointer.
The four direct registers are selected by setting pins A0 and A1 to the appropriate logic
levels before a read or write operation is executed on the parallel bus.
The seven indirect registers require that the INDPTR (indirect register pointer, one of the
four direct registers described above) is initially loaded with the address of the register in
the indirect address space before a read or write is performed to the INDIRECT data field.
For example, in order to write to the indirectly addressed I2CSCLL register, the INDPTR
register should be loaded with 02h by performing a write to the direct INDPTR register
(A1 = 0, A0 = 0). Then the I2CSCLL register can be programmed by writing to the
INDIRECT data field (A1 = 1, A0 = 0) in the direct address space. Register mapping is
described in
Remark: Do not write to any I
is in master or addressed slave mode.
Table 3.
[1]
Register name
I2CSTA
INDPTR
I2CDAT
I2CCON
INDIRECT
See
Section 8.10 “Power-on reset”
Direct register selection by setting A0 and A1
Table
2
C-bus. On the I
3,
Register function
status
indirect register pointer
data
control
indirect data field
access
Table 4
Rev. 03 — 12 August 2008
2
C-bus and the parallel-bus microcontroller is carried out on a
and
2
C-bus registers while the I
2
C-bus, it can act either as a master or slave. Bidirectional
for more detail.
Figure
6.
A1
0
0
0
1
1
Fm+ parallel bus to I
A0
0
0
1
1
0
2
C-bus is busy and the PCA9665
Read/Write
R
W
R/W
R/W
R/W
PCA9665
© NXP B.V. 2008. All rights reserved.
2
C-bus controller
2
C-bus timing.
Default
F8h
00h
00h
00h
00h
[1]
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