TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 108

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

7.6
Exception/Interrupt-Related Registers
31-29
28-24
23-21
20-16
15-13
12-8
7-5
4-0
After reset
After reset
After reset
After reset
bit symbol
bit symbol
bit symbol
bit symbol
7.6.2.16
Bit
PRI_7
−
PRI_6
−
PRI_5
−
PRI_4
−
0xE000_ED1C
0xE000_ED18
0xE000_ED20
Bit Symbol
ception.
for assigning a priority.
Fault and Usage Fault. Unused bits return "0" when read, and writing to unused bits has no effect.
Each exception is provided with eight bits of a System Handler Priority Register.
The following shows the addresses of the System Handler Priority Registers corresponding to each ex-
The number of bits to be used for assigning a priority varies with each product. This product uses three bits
The following shows the fields of the System Handler Priority Registers for Memory Management, Bus
System Handler Priority Register
31
23
15
0
0
0
7
0
R/W
R
R/W
R
R/W
R
R/W
R
Type
31
PRI_7
PRI_6
PRI_5
PRI_4
30
22
14
0
0
0
6
0
Reserved
Read as 0.
Priority of Usage Fault
Read as 0.
Priority of Bus Fault
Read as 0.
Priority of Memory Management
Read as 0.
(SysTick)
(SVCall)
PRI_11
PRI_15
PRI_7
24 23
29
21
13
0
0
0
5
0
(Usage Fault)
(PendSV)
PRI_10
PRI_14
Page 88
PRI_6
28
20
12
0
0
0
4
0
-
-
-
-
16 15
27
19
11
Function
0
0
0
3
0
-
-
-
-
(Bus Fault)
PRI_13
PRI_5
PRI_9
26
18
10
0
0
0
2
0
-
-
-
-
TMPM333FDFG/FYFG/FWFG
8 7
(Memory Management)
(Debug Monitor)
25
17
PRI_12
0
0
9
0
1
0
-
-
-
-
PRI_4
PRI_8
0
24
16
0
0
8
0
0
0
-
-
-
-