TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 410

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

15.2
Operation Mode
Table 15-9 Transfer Format for the Chip and Protection Bit Erase Command
Boot ROM
15.2.9.4
Note 1: In I/O Interface mode, the baud rate for the transfers of the first and second bytes must be 1/16 of the desired
Note 2: In case of any negative acknowledge, the boot program returns to a state in which it waits for a command code
1 byte
2 byte
3 byte
4 byte
5 byte
6 byte
7 byte
8 byte
baud rate.
(3rd byte). In I/O Interface mode, if a communication error occurs, a negative acknowledge does not occur.
Byte
Chip Erase and Protect Bit Erase
Serial operation mode and baud rate
For UART mode : 0x86
For I/O Interface mode : 0x30
−
Command code (0x40)
−
Chip erase command code (0x54)
−
−
(Wait for the next command code.)
to the TMPM333FDFG/FYFG/FWFG
Data Transferred from the Controller
Page 390
Desired baud
rate (Note 1)
Baud rate
−
ACK for the serial operation mode byte
・For UART mode
-Normal acknowledge : 0x86
・For I/O Interface mode
-Normal acknowledge : 0x30
(The boot program aborts if the baud rate can not
be set correctly.)
−
ACK for the command code byte (Note 2)
-Normal acknowledge : 0x40
-Negative acknowledge : 0xX1
-Communication error : 0xX8
−
ACK for the command code byte (Note 2)
-Normal acknowledge : 0x54
-Negative acknowledge : 0xX1
-Communication error : 0xX8
ACK for the chip erase command code byte
-Normal acknowledge : 0x4F
-Negative acknowledge : 0x4C
−
Data Transferred from the TMPM333FDFG/
TMPM333FDFG/FYFG/FWFG
FYFG/FWFG to the Controller