TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 368

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TMPM333FDFG

Manufacturer Part Number
TMPM333FDFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
Manufacturer
Toshiba
Datasheets

Specifications of TMPM333FDFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
512K
Rom Type
Flash
Ram (kbytes)
32K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM333FDFG
Manufacturer:
Toshiba
Quantity:
10 000
13.5
Control register
13.5.3
13.5.3.1
13.5.3.2
13.5.3.3
13.5.3.4
Setting example
watchdog timer can be disabled and the binary counter can be cleared.
By writing the disable code (0xB1) to this WDCR register after setting WDMOD <WDTE> to "0," the
Set WDMOD <WDTE> to "1".
Writing the clear code (0x4E) to the WDCR register clears the binary counter and it restarts counting.
In the case that 2
Disabling control
Enabling control
Watchdog timer clearing control
Detection time of watchdog timer
WDMOD
WDCR
WDMOD
WDCR
WDMOD
21
/fsys is used, set "011" to WDMOD<WDTP[2:0]>.
7
0
1
7
1
7
0
7
1
6
0
6
6
1
6
0
Page 348
5
1
5
5
0
5
1
4
1
4
4
0
4
1
3
0
3
3
1
3
2
0
2
2
1
2
1
0
1
1
1
1
0
1
0
0
0
0
Set <WDTE> to "0".
Writes the disable code (0xB1).
Set <WDTE> to "1".
Writes the clear code (0x4E).
TMPM333FDFG/FYFG/FWFG

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