PCA9506DGG,512 NXP Semiconductors, PCA9506DGG,512 Datasheet - Page 2

• Manufacturer Part Number: PCA9506DGG,512
• Description: IC I/O EXPANDER I2C 40B 56TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCA9506DGG,512

• Package / Case: 56-TSSOP
• Interface: I²C
• Number Of I /o: 40
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: POR
• Logic Family: PCA9506
• Number Of Lines (input / Output): 40.0 / 40.0
• Operating Supply Voltage: 2.3 V to 5.5 V
• Power Dissipation: 500 mW
• Operating Temperature Range: - 40 C to + 85 C
• Input Voltage: 5.5 V
• Logic Type: I/O Expander
• Maximum Clock Frequency: 400 KHz
• Mounting Style: SMD/SMT
• Number Of Input Lines: 40.0
• Number Of Output Lines: 40.0
• Output Current: 50 mA
• Output Voltage: 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3354-5; 935280798512; PCA9506DGG

NXP Semiconductors
3. Applications
4. Ordering information
Table 1.
PCA9505_9506
Product data sheet
Type number
PCA9505DGG
PCA9506DGG
PCA9506BS
Ordering information
Topside mark
PCA9505DGG
PCA9506DGG
PCA9506BS
Inputs:
Active LOW reset (RESET) input pin resets device to power-up default state
3 programmable address pins allowing 8 devices on the same bus
Designed for live insertion
Low standby current
−40 °C to +85 °C operation
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78, which exceeds 100 mA
Offered in TSSOP56 (PCA9505, PCA9506) and HVQFN56 (PCA9506) packages
Servers
RAID systems
Industrial control
Medical equipment
PLCs
Cell phones
Gaming machines
Instrumentation and test measurement
Programmable Interrupt Mask Control for input pins that do not require an interrupt
when their states change
Polarity Inversion register allows inversion of the polarity of the I/O pins when read
Minimize line disturbance (I
Signal transient rejection (50 ns noise filter and robust I
Package
Name
TSSOP56
TSSOP56
HVQFN56
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 3 August 2010
Description
plastic thin shrink small outline package; 56 leads;
body width 6.1 mm
plastic thin shrink small outline package; 56 leads;
body width 6.1 mm
plastic thermal enhanced very thin quad flat package;
no leads; 56 terminals; body 8 × 8 × 0.85 mm
OFF
and power-up 3-state)
40-bit I
2
C-bus I/O port with RESET, OE and INT
2
C-bus state machine)
PCA9505/06
© NXP B.V. 2010. All rights reserved.
Version
SOT364-1
SOT364-1
SOT684-1
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