PCA9506DGG,512 NXP Semiconductors, PCA9506DGG,512 Datasheet - Page 9

• Manufacturer Part Number: PCA9506DGG,512
• Description: IC I/O EXPANDER I2C 40B 56TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCA9506DGG,512

• Package / Case: 56-TSSOP
• Interface: I²C
• Number Of I /o: 40
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: POR
• Logic Family: PCA9506
• Number Of Lines (input / Output): 40.0 / 40.0
• Operating Supply Voltage: 2.3 V to 5.5 V
• Power Dissipation: 500 mW
• Operating Temperature Range: - 40 C to + 85 C
• Input Voltage: 5.5 V
• Logic Type: I/O Expander
• Maximum Clock Frequency: 400 KHz
• Mounting Style: SMD/SMT
• Number Of Input Lines: 40.0
• Number Of Output Lines: 40.0
• Output Current: 50 mA
• Output Voltage: 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3354-5; 935280798512; PCA9506DGG

NXP Semiconductors
Table 3.
PCA9505_9506
Product data sheet
Register #
(hex)
Input Port registers
00
01
02
03
04
05
06
07
Output Port registers
08
09
0A
0B
0C
0D
0E
0F
Polarity Inversion registers
10
11
12
13
14
15
16
17
I/O Configuration registers
18
19
1A
1B
1C
1D
1E
1F
Register summary
D5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7.3 Register definitions
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
All information provided in this document is subject to legal disclaimers.
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Rev. 4 — 3 August 2010
Symbol
IP0
IP1
IP2
IP3
IP4
-
-
-
OP0
OP1
OP2
OP3
OP4
-
-
-
PI0
PI1
PI2
PI3
PI4
-
-
-
IOC0
IOC1
IOC2
IOC3
IOC4
-
-
-
40-bit I
Access
read only
read only
read only
read only
read only
-
-
-
read/write
read/write
read/write
read/write
read/write
-
-
-
read/write
read/write
read/write
read/write
read/write
-
-
-
read/write
read/write
read/write
read/write
read/write
-
-
-
2
C-bus I/O port with RESET, OE and INT
Description
Input Port register bank 0
Input Port register bank 1
Input Port register bank 2
Input Port register bank 3
Input Port register bank 4
reserved for future use
reserved for future use
reserved for future use
Output Port register bank 0
Output Port register bank 1
Output Port register bank 2
Output Port register bank 3
Output Port register bank 4
reserved for future use
reserved for future use
reserved for future use
Polarity Inversion register bank 0
Polarity Inversion register bank 1
Polarity Inversion register bank 2
Polarity Inversion register bank 3
Polarity Inversion register bank 4
reserved for future use
reserved for future use
reserved for future use
I/O Configuration register bank 0
I/O Configuration register bank 1
I/O Configuration register bank 2
I/O Configuration register bank 3
I/O Configuration register bank 4
reserved for future use
reserved for future use
reserved for future use
PCA9505/06
© NXP B.V. 2010. All rights reserved.
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