ATmega3290P Atmel Corporation, ATmega3290P Datasheet - Page 51
ATmega3290P
Manufacturer Part Number
ATmega3290P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega3290P
Flash (kbytes)
32 Kbytes
Pin Count
100
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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8021G–AVR–03/11
• Bit 3 – WDE: Watchdog Enable
When the WDE is written to logic one, the Watchdog Timer is enabled, and if the WDE is written
to logic zero, the Watchdog Timer function is disabled. WDE can only be cleared if the WDCE bit
has logic level one. To disable an enabled Watchdog Timer, the following procedure must be
followed:
1. In the same operation, write a logic one to WDCE and WDE. A logic one must be written
2. Within the next four clock cycles, write a logic 0 to WDE. This disables the Watchdog.
In safety level 2, it is not possible to disable the Watchdog Timer, even with the algorithm
described above.
page
• Bits 2:0 – WDP2, WDP1, WDP0: Watchdog Timer Prescaler 2, 1, and 0
The WDP2, WDP1, and WDP0 bits determine the Watchdog Timer prescaling when the Watch-
dog Timer is enabled. The different prescaling values and their corresponding Time-out Periods
are shown in
Table 10-2.
WDP2
to WDE even though it is set to one before the disable operation starts.
0
0
0
0
1
1
1
1
49.
WDP1
Table 10-2 on page
0
0
1
1
0
0
1
1
Watchdog Timer Prescale Select
”Timed Sequences for Changing the Configuration of the Watchdog Timer” on
WDP0
0
1
0
1
0
1
0
1
Oscillator Cycles
Number of WDT
51.
1,024K cycles
2,048K cycles
128K cycles
256K cycles
512K cycles
16K cycles
32K cycles
64K cycles
Typical Time-out at
ATmega329P/3290P
V
CC
17.1ms
34.3ms
68.5ms
0.14s
0.27s
0.55s
1.1s
2.2s
= 3.0V
Typical Time-out at
V
CC
16.3ms
32.5ms
65ms
0.13s
0.26s
0.52
1.0s
2.1s
= 5.0V
51
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