DS21348

Manufacturer Part NumberDS21348
Description3.3V E1/T1/J1 Line Interface
ManufacturerDallas Semiconducotr
DS21348 datasheet
 


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LOOP BACK CONTROL IN HARDWARE MODE Table 4-5
LOOPBACK
SYMBOL
Remote Loop Back
Local Loop Back
Analog Loop Back
No Loop Back
TRANSMIT DATA CONTROL IN HARDWARE MODE Table 4-6
TRANSMIT DATA
Transmit Unframed All Ones
Transmit Alternating Ones and Zeros
Transmit PRBS
TPOS and TNEG
RECEIVE SENSITIVITY SETTINGS Table 4-7
EGL
(CCR4.4)
0
1
1
0
MONITOR GAIN SETTINGS Table 4-8
MM1
(CCR5.5)
0
0
1
1
INTERNAL RX TERMINATION SELECT Table 4-9
RT1
(CCR5.1)
0
0
1
1
MCLK SELECTION Table 4-10
MCLK
2.048MHz
2.048MHz
1.544MHz
CONTROL BIT
RLB
CCR6.6
LLB
CCR6.7
ALB
CCR6.4
-
-
SYMBOL
CONTROL BIT
TUA1
TAOZ
TPRBSE
-
ETS
(CCR1.7)
0 (E1)
-12 dB (short haul)
0 (E1)
-43 dB (long haul)
1 (T1)
-30 dB (limited long haul)
1 (T1)
-36 dB (long haul)
MM0
(CCR5.4)
0
1
0
1
RT0
(CCR5.0)
0
Internal receive-side termination disabled
1
Internal receive-side 120W enabled
0
Internal receive-side 100W enabled
1
Internal receive-side 75W enabled
JAMUX
(CCR1.3)
0
1
0
20 of 73
LOOP1
1
1
0
0
TX1
CCR3.7
1
CCR3.5
1
CCR3.4
0
-
0
RECEIVE SENSITIVITY
INTERNAL LINEAR GAIN
BOOST (dB)
Normal operation (no boost)
20
26
32
INTERNAL RECEIVE
TERMINATION CONFIGURATION
ETS
(CCR1.7)
0
1
1
LOOP0
1
0
1
0
TX0
1
0
1
0