DS21348 Dallas Semiconducotr, DS21348 Datasheet - Page 20

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DS21348

Manufacturer Part Number
DS21348
Description
3.3V E1/T1/J1 Line Interface
Manufacturer
Dallas Semiconducotr
Datasheet

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LOOP BACK CONTROL IN HARDWARE MODE Table 4-5
Remote Loop Back
Local Loop Back
Analog Loop Back
No Loop Back
TRANSMIT DATA CONTROL IN HARDWARE MODE Table 4-6
Transmit Unframed All Ones
Transmit Alternating Ones and Zeros
Transmit PRBS
TPOS and TNEG
RECEIVE SENSITIVITY SETTINGS Table 4-7
MONITOR GAIN SETTINGS Table 4-8
INTERNAL RX TERMINATION SELECT Table 4-9
MCLK SELECTION Table 4-10
LOOPBACK
(CCR5.1)
2.048MHz
2.048MHz
1.544MHz
(CCR4.4)
(CCR5.5)
TRANSMIT DATA
MCLK
RT1
MM1
EGL
0
0
1
1
0
1
1
0
0
0
1
1
SYMBOL
RLB
ALB
LLB
-
(CCR5.0)
RT0
(CCR1.7)
(CCR5.4)
(CCR1.3)
JAMUX
0
1
0
1
0 (E1)
0 (E1)
1 (T1)
1 (T1)
MM0
ETS
0
1
0
1
0
1
0
SYMBOL
TPRBSE
CONTROL BIT
TAOZ
TUA1
-
CCR6.6
CCR6.7
CCR6.4
-
20 of 73
Internal receive-side termination disabled
Internal receive-side 120W enabled
Internal receive-side 100W enabled
Internal receive-side 75W enabled
CONTROL BIT
-12 dB (short haul)
-43 dB (long haul)
-30 dB (limited long haul)
-36 dB (long haul)
TERMINATION CONFIGURATION
INTERNAL LINEAR GAIN
Normal operation (no boost)
RECEIVE SENSITIVITY
CCR3.4
CCR3.7
CCR3.5
-
INTERNAL RECEIVE
BOOST (dB)
LOOP1
(CCR1.7)
1
1
0
0
ETS
20
26
32
0
1
1
TX1
1
1
0
0
LOOP0
1
0
1
0
TX0
1
0
1
0

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