DS21348

Manufacturer Part NumberDS21348
Description3.3V E1/T1/J1 Line Interface
ManufacturerDallas Semiconducotr
DS21348 datasheet
 


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HARDWARE MODE PINOUT (BIS1 = 1, BIS0 = 1) Figure 4-3
1 EGL
2 ETS
3 NRZE
4 SCLKE
DS21348
5 L2
Hardware
6 L1
Operation
7 L0
8 DJA
9 JAMUX
10 JAS
11 HBE
5. HARDWARE MODE
In hardware mode (BIS1 = 1, BIS0 = 1), pins 1-19, 23, 25, 31, and 44 are redefined to be used for
initializing the DS21348. BPCLK (pin 31) defaults to a 16.384MHz output when in hardware mode. The
RCL/LOTC (pin 25) is designated to RCL when in hardware mode. JABDS (CCR4.2) defaults to logic 0.
The RHBE (CCR2.3) and THBE (CCR2.2) control bits are combined and controlled by HBE at pin 11
while the RSCLKE (CCR5.3) and TSCLKE (CCR5.2) bits are combined and controlled by SCLKE at
pin 4. TCES (CCR2.1) and RCES (CCR2.0) are combined and controlled by CES at pin 12. The
transmitter functions are combined and controlled by TX1 (pin 15) and TX0 (pin 14). The loopback
functions are controlled by LOOP1 (pin 17) and LOOP0 (pin 16). All other control bits default to the
logic 0 setting.
BIS1 33
tie high
BIS0 32
tie high
BPCLK 31
MCLK 30
HRST* 29
RRING 28
RTIP 27
TEST 26
RCL 25
PBEO 24
RT1 23
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