mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 123

• Manufacturer Part Number: mc68hc08qa24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

MC68HC08QA24
Freescale Semiconductor
ACQ — Acquisition Mode Bit
XLD — Crystal Loss Detect Bit
PBWC3–PBWC0 — Reserved for Test
When the AUTO bit is set, ACQ is a read-only bit that indicates
whether the PLL is in acquisition mode or tracking mode. When the
AUTO bit is clear, ACQ is a read/write bit that controls whether the
PLL is in acquisition or tracking mode.
In automatic bandwidth control mode (AUTO = 1), the last-written
value from manual operation is stored in a temporary location and is
recovered when manual operation resumes. Reset clears this bit,
enabling acquisition mode.
When the VCO output (CGMVCLK) is driving CGMOUT, this
read/write bit can indicate whether the crystal reference frequency is
active or not. To check the status of the crystal reference, follow these
steps:
The crystal loss detect function works only when the BCS bit is set,
selecting CGMVCLK to drive CGMOUT. When BCS is clear, XLD
always reads as logic 0.
These bits enable test functions not available in user mode. To ensure
software portability from development systems to user applications,
software should write 0s to PBWC3–PBWC0 whenever writing to
PBWC.
1. Write a logic 1 to XLD.
2. Wait N × 4 cycles. (N is the VCO frequency multiplier.)
3. Read XLD.
1 = Tracking mode
0 = Acquisition mode
1 = Crystal reference not active
0 = Crystal reference active
Clock Generator Module (CGM)
Clock Generator Module (CGM)
Technical Data
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