mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 150

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mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
System Integration Module (SIM)
10.8.2 SIM Reset Status Register
Technical Data
148
This code works if the H register has been pushed onto the stack in the break
service routine software. This code should be executed at the end of the break
service routine software.
HIBYTE
LOBYTE
DOLO
RETURN
EQU
EQU
If not SBSW, do RTI
BRCLR
TST
BNE
DEC
DEC
PULH
RTI
5
6
SBSW,SBSR, RETURN
LOBYTE,SP
DOLO
HIBYTE,SP
LOBYTE,SP
This register contains seven flags that show the source of the last reset.
All flag bits are automatically cleared following a read of the register. The
register is initialized on power-up as shown with the POR bit set and all
other bits cleared. However, since the POR circuit releases the part at a
lower voltage than the LVI trip point, the LVI bit may also be set when
first reading the register after a power-up. Also, during a POR or any
other internal reset, the RST pin is pulled low. After the pin is released,
it will be sampled 32 XCLK cycles later. If the pin is not above a V
that time then the PIN bit in the SRSR may be set in addition to whatever
other bits are set.
SBSW can be read within the break state SWI routine. The user can
modify the return address on the stack by subtracting one from it. The
following code is an example of this. Writing 0 to the SBSW bit
clears it.
System Integration Module (SIM)
;
;
;If RETURNLO is not zero,
;then just decrement low byte.
;Else deal with high byte, too.
;Point to WAIT/STOP opcode.
;Restore H register.
See if wait mode or stop mode was exited by
break.
Freescale Semiconductor
MC68HC08QA24
IH
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