mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 141

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mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
10.5 SIM Counter
10.5.1 SIM Counter During Power-On Reset
10.5.2 SIM Counter During Stop Mode Recovery
10.5.3 SIM Counter and Reset States
MC68HC08QA24
Freescale Semiconductor
The SIM counter is used by the power-on reset module (POR) and in
stop mode recovery to allow the oscillator time to stabilize before
enabling the internal bus (IBUS) clocks. The SIM counter also serves as
a prescaler for the computer operating properly (COP) module. The SIM
counter overflow supplies the clock for the COP module. The SIM
counter is 12 bits long and is clocked by the falling edge of CGMXCLK.
The power-on reset module (POR) detects power applied to the MCU.
At power-on, the POR circuit asserts the signal PORRST. Once the SIM
is initialized, it enables the clock generation module (CGM) to drive the
bus clock state machine.
The SIM counter also is used for stop mode recovery. The STOP
instruction clears the SIM counter. After an interrupt, break, or reset, the
SIM senses the state of the short stop recovery bit, SSREC, in the
CONFIG register ($001F). If the SSREC bit is a logic 1, then the stop
recovery is reduced from the normal delay of 4096 CGMXCLK cycles
down to 32 CGMXCLK cycles. This is ideal for applications using canned
oscillators that do not require long startup times from stop mode.
External crystal applications should use the full stop recovery time, that
is, with SSREC cleared.
External reset has no effect on the SIM counter. (See
for details.) The SIM counter is free-running after all reset states. (See
10.4.2 Active Resets from Internal Sources
internal reset recovery sequences.)
System Integration Module (SIM)
System Integration Module (SIM)
for counter control and
10.7.2 Stop Mode
Technical Data
139

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