mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 154

• Manufacturer Part Number: mc68hc08qa24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Low-Voltage Inhibit (LVI)
11.4 Functional Description
Technical Data
152
DETECTOR
LOW V
V
DD
DD
V
V
DD
DD
Figure 11-1
out of reset. The LVI module contains a bandgap reference circuit and
comparator. The LVI power bit, LVIPWR, enables the LVI to monitor V
voltage. The LVI reset bit, LVIRST, enables the LVI module to generate
a reset when V
that level for nine or more consecutive CPU cycles. LVISTOP enables
the LVI module during stop mode. This will ensure that when the STOP
instruction is implemented, the LVI will continue to monitor the voltage
level on V
register (MOR) ($001F). See
reset occurs, the MCU remains in reset until V
LVI
MCU out of reset. (See
the comparator controls the state of the LVIOUT flag in the LVI status
register (LVISR).
An LVI reset also drives the RST pin low to provide low-voltage
protection to external peripheral devices.
> LVI
< LVI
Figure 11-1. LVI Module Block Diagram
CPU CLOCK
TRIP
TRIP
TRIPR
= 0
= 1
ANLGTRIP
FROM CONFIG
. V
LVIPWR
DD
DD
. LVIPWR, LVISTOP, and LVIRST are in the mask option
shows the structure of the LVI module. The LVI is enabled
must be above LVI
DIGITAL FILTER
Low-Voltage Inhibit (LVI)
FROM CONFIG
DD
Fliter Bypass
Stop Mode
LVISTOP
falls below a voltage, LVI
V
DD
11.4.2 Forced Reset
LVIOUT
5.4 Mask Option
TRIPR
FROM CONFIG
for only one CPU cycle to bring the
LVIRST
TRIPF
Operation.) The output of
DD
, and remains at or below
Register. Once an LVI
rises above a voltage,
Freescale Semiconductor
LVI RESET
MC68HC08QA24
DD