mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 351

no-image

mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
22.7 Interrupts
MC68HC08QA24
Freescale Semiconductor
The MSCAN08 supports four interrupt vectors mapped onto eleven
different interrupt sources, any of which can be individually masked for
details see
MSCAN08 Transmitter Control
Transmit interrupt — At least one of the three transmit buffers is
empty (not scheduled) and can be loaded to schedule a message
for transmission. The TXE flags of the empty message buffers are
set.
Receive interrupt — A message has been received successfully
and loaded into the foreground receive buffer. This interrupt will be
emitted immediately after receiving the EOF symbol. The RXF flag
is set.
Wakeup interrupt — An activity on the CAN bus occurred during
MSCAN08 internal sleep mode.
Error interrupt — An overrun, error, or warning condition occurred.
The receiver flag register (CRFLG) will indicate one of the
following conditions:
– Overrun — An overrun condition as described in
– Receiver warning — The receive error counter has reached
– Transmitter warning — The transmit error counter has reached
– Receiver error passive — The receive error counter has
– Transmitter error passive — The transmit error counter has
– Bus off — The transmit error counter has exceeded 255 and
Receive Structures
the CPU Warning limit of 96.
the CPU Warning limit of 96.
exceeded the error passive limit of 127 and MSCAN08 has
gone to error passive state.
exceeded the error passive limit of 127 and MSCAN08 has
gone to error passive state.
MSCAN08 has gone to bus off state.
22.14.5 MSCAN08 Receiver Flag Register
CAN Controller
has occurred.
Register.
to
22.5.2
CAN Controller
22.14.8
Technical Data
349

Related parts for mc68hc08qa24