w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 105
w83877atd
Manufacturer Part Number
w83877atd
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83877ATD.pdf
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Table 7-1 IRQSER Sampling periods
7.3 Stop Frame
After all IRQ/Data Frames have beencompleted, the host controller will terminate IRQSER by a Stop
frame. Only the host controller can initiate the Stop frame by driving IRQSER low for 2 or 3 clocks. If
the Stop Frame is low for 2 clocks, the next IRQSER cycle's Sample mode is the Quiet mode. If the
Stop Frame is low for 3 clocks, the next IRQSER cycle's Sample mode is the Continuous mode.
7.4 Reset and Initialization
After MR reset, IRQSER Slaves are put into the Continuous(Idle) mode. The Host Controller is
responsibe for starting the initial IRQSER Cycle to collect system's IRQ/Data default values. The
system then follows with the Continuous/Quiet mode protocol (Stop Frame pulse width) for
subsequent IRQSER cycles. It's the Host Controller's responsibility to provide the default values to
8259's and other system logic before the first IRQSER cycle is performed. For IRQSER system
suspend, insertion, or removal application, the Host controller should be programmed into
Continuous(Idle) mode first. This is to guarantee IRQSER bus in the Idle state before the system
configuration changes.
IRQ/Data Frame
32:22
10
11
12
13
14
15
16
17
18
19
20
21
1
2
3
4
5
6
7
8
9
Signal Sampled
Unassigned
IOCHCK
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
INTC
INTD
INTA
INTB
IRQ0
IRQ1
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
SMI
- 101 -
# of clocks past Start
Publication Release Date: April 1998
11
14
17
20
23
26
29
32
35
38
41
44
47
50
53
56
59
62
95
2
5
8
W83877ATF
Version 0.51
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