w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 149

• Manufacturer Part Number: w83877atd
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

PRTTRAPSTS (Bit 3): printer port trap status.
FDCTRAPSTS (Bit 2): FDC trap status.
URATRAPSTS (Bit 1): UART A trap status.
URBTRAPSTS (Bit 0): UART B trap status.
8.2.52 Configuration Register 42 (CR42), default=N/A
When the device is in Extended Function mode and EFIR is 42H, the CR42 register can be accessed
through EFDR. The bit definitions are as follows:
Bit 7 - bit 4 : Reserved, fixed at 0.
Bit 3 - bit 0 : Device's IRQ status .
0
1
0
1
0
1
0
1
the printer port is now in the sleeping state.
the printer port is now in the working state due to any printer port access, any
IRQ, any DMA acknowledge, and any transition on BUSY, ACK , PE, SLCT, and
FDC is now in the sleeping state.
FDC is now in the working state due to any FDC access, any IRQ, any DMA
acknowledge, and any enabling of the motor enable bits in the DOR register.
UART A is now in the sleeping state.
UART A is now in the working state due to any UART A access, any IRQ, the
receiver begins receiving a start bit, the transmitter shift register begins
transmitting a start bit, and any transition on MODEM control input lines.
UART B is now in the sleeping state.
UART B is now in the working state due to any UART B access, any IRQ, the
receiver begins receiving a start bit, the transmitter shift register begins
transmitting a start bit, and any transition on MODEM control input lines.
ERR pins.
7
6
5
4
3
- 145 -
2
1
0
URBIRQSTS
URAIRQSTS
FDCIRQSTS
PRTIRQSTS
reserved
reserved
reserved
reserved
Publication Release Date: April 1998
W83877ATF
Version 0.51