w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 163

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w83877atd

Manufacturer Part Number
w83877atd
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
0-7
8.4.11 Power Management 1 Timer 3 (PM1TMR3)
Register Location:
Default Value:
Attribute:
Size:
0-7
Bit
Bit
TMR_VAL
TMR_VAL
Name
Name
7
6
This read-only field returns the running count of the power management timer.
This is a 24-bit counter that runs off of a 3.579545 MHZ clock, and counts
while in the system working state. The timer is reset and then continues
counting until the CLKIN input to the chip is stopped. If the clock is restarted
without a MR reset, then the counter will continue counting from where it
stopped. The TMR_STS bit is set any time the last bit of the timer (bit 23)
goes from 0 to 1 or from 1 to 0. If the TMR_EN bit is set, the setting of the
TMR_STS bit will generate an SCI interrupt.
This read-only field returns the running count of the power management timer.
This is a 24-bit counter that runs off of a 3.579545 MHZ clock, and counts
while in the system working state. The timer is reset and then continues
counting until the CLKIN input to the chip is stopped. If the clock is restarted
without a MR reset, then the counter will continue counting from where it
stopped. The TMR_STS bit is set any time the last bit of the timer (bit 23)
goes from 0 to 1 or from 1 to 0. If the TMR_EN bit is set, the setting of the
TMR_STS bit will generate an SCI interrupt.
<CR33>+AH System I/O Space
00h
Read only
8 bits
5
4
3
2
1
- 159 -
0
TMR_VAL16
TMR_VAL17
TMR_VAL18
TMR_VAL19
TMR_VAL20
TMR_VAL21
TMR_VAL22
TMR_VAL23
Description
Description
Publication Release Date: April 1998
W83877ATF
Version 0.51

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